Project

General

Profile

Bug #7720

mips16/data_mem.v: The expression to be computed (ram) contains unevaluated variables: [ram]

Added by Sergey Smolov over 3 years ago. Updated almost 3 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Category:
Engine (Generator)
Target version:
Start date:
11/13/2016
Due date:
% Done:

100%

Estimated time:
Detected in build:
verilog.benchmarks
Platform:
Windows x64
Published in build:
1.0.1-beta-170912

Description

2016.11.13 19:32:44.703. INFO: Retrascope is starting
2016.11.13 19:32:44.703. INFO: Running: verilog-parser

2016.11.13 19:32:44.703. INFO: Options: {v=[D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16\data_mem.v], args=D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16\data_mem.v --target vhdl-testbench --include-path D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16 --engine efsm-test-generator;test-verilog-testbench-printer --overwrite-existing --loop-limit 25}

Including file 'D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16\data_mem.v'
2016.11.13 19:32:44.707. INFO: Storing: cfg

2016.11.13 19:32:44.707. INFO: Running: cfg-cfginterface-extractor

2016.11.13 19:32:44.707. INFO: Options: {args=D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16\data_mem.v --target vhdl-testbench --include-path D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16 --engine efsm-test-generator;test-verilog-testbench-printer --overwrite-existing --loop-limit 25, cfg=<cfg>}

2016.11.13 19:32:44.707. INFO: Storing: cfg-iface

2016.11.13 19:32:44.707. INFO: Running: cfg-cgaa-transformer

2016.11.13 19:32:44.707. INFO: Options: {args=D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16\data_mem.v --target vhdl-testbench --include-path D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16 --engine efsm-test-generator;test-verilog-testbench-printer --overwrite-existing --loop-limit 25, cfg=<cfg>}

2016.11.13 19:32:44.707. INFO: Storing: cgaa

2016.11.13 19:32:44.707. INFO: Running: cgaa-efsm-transformer

2016.11.13 19:32:44.707. INFO: Options: {cgaa=<cgaa>, args=D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16\data_mem.v --target vhdl-testbench --include-path D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16 --engine efsm-test-generator;test-verilog-testbench-printer --overwrite-existing --loop-limit 25}

2016.11.13 19:32:44.708. INFO: Number of GADD paths: 3
2016.11.13 19:32:44.708. INFO: ======================================
2016.11.13 19:32:44.708. INFO: Clock-like variables: [clk].
2016.11.13 19:32:44.708. INFO: Transforming the process of module: data_mem.
2016.11.13 19:32:44.708. INFO: The state-like variables are: <none>.
2016.11.13 19:32:44.708. INFO: The number of model states: 1.
2016.11.13 19:32:44.708. INFO: The number of model transitions: 2.
2016.11.13 19:32:44.708. INFO: Clock-like variables: [].
2016.11.13 19:32:44.708. INFO: Transforming the process of module: data_mem.
2016.11.13 19:32:44.708. INFO: The state-like variables are: <none>.
2016.11.13 19:32:44.708. INFO: The number of model states: 1.
2016.11.13 19:32:44.708. INFO: The number of model transitions: 1.
2016.11.13 19:32:44.708. INFO: The number of extracted models: 2.
2016.11.13 19:32:44.708. INFO: Storing: efsm

2016.11.13 19:32:44.708. INFO: Running: efsm-test-generator

2016.11.13 19:32:44.708. INFO: Options: {efsm=<efsm>, args=D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16\data_mem.v --target vhdl-testbench --include-path D:\Bot\projects\retrascope.git\build\resources\test\opencores\mips16 --engine efsm-test-generator;test-verilog-testbench-printer --overwrite-existing --loop-limit 25}

2016.11.13 19:32:44.708. INFO: EFSM.TestGenerator: module data_mem: starting test generation

The expression to be computed (ram) contains unevaluated variables: [ram]
java.lang.IllegalArgumentException: The expression to be computed (ram) contains unevaluated variables: [ram]
at ru.ispras.retrascope.engine.efsm.simulator.ProcessSimulator.computeExpression(ProcessSimulator.java:404)
at ru.ispras.retrascope.engine.efsm.simulator.ProcessSimulator.executeAssignment(ProcessSimulator.java:383)
at ru.ispras.retrascope.engine.efsm.simulator.ProcessSimulator.executeAction(ProcessSimulator.java:279)
at ru.ispras.retrascope.engine.efsm.simulator.ProcessSimulator.traverse(ProcessSimulator.java:181)
at ru.ispras.retrascope.engine.efsm.simulator.ProcessSimulator.simulateVector(ProcessSimulator.java:465)
at ru.ispras.retrascope.engine.efsm.simulator.ModuleSimulator.simulateVector(ModuleSimulator.java:125)
at ru.ispras.retrascope.engine.efsm.generator.test.Generator.generateRandomly(Generator.java:222)
at ru.ispras.retrascope.engine.efsm.generator.test.Generator.generateTest(Generator.java:123)
at ru.ispras.retrascope.engine.efsm.generator.test.EfsmTestGenerator.start(EfsmTestGenerator.java:123)
at ru.ispras.retrascope.engine.efsm.generator.test.EfsmTestGenerator.start(EfsmTestGenerator.java:43)
at ru.ispras.retrascope.basis.Engine.start(Engine.java:214)
at ru.ispras.retrascope.basis.ToolChain.start(ToolChain.java:112)
at ru.ispras.retrascope.basis.Engine.start(Engine.java:214)
at ru.ispras.retrascope.Retrascope$ToolRun.start(Retrascope.java:211)
at ru.ispras.retrascope.Retrascope.main(Retrascope.java:419)
at ru.ispras.retrascope.Retrascope.main(Retrascope.java:371)
at ru.ispras.retrascope.HdlTestUtils.runRetrascope(HdlTestUtils.java:335)
at ru.ispras.retrascope.HdlTestUtils.runVerilog(HdlTestUtils.java:231)
at ru.ispras.retrascope.HdlTestUtils.runVerilog(HdlTestUtils.java:200)
at ru.ispras.retrascope.engine.test.printer.testbench.verilog.TestVerilogTestbenchPrinterVerilogTestCase.generate(TestVerilogTestbenchPrinterVerilogTestCase.java:62)
at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:57)
at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.lang.reflect.Method.invoke(Method.java:606)
at org.junit.runners.model.FrameworkMethod$1.runReflectiveCall(FrameworkMethod.java:44)
at org.junit.internal.runners.model.ReflectiveCallable.run(ReflectiveCallable.java:15)
at org.junit.runners.model.FrameworkMethod.invokeExplosively(FrameworkMethod.java:41)
at org.junit.internal.runners.statements.InvokeMethod.evaluate(InvokeMethod.java:20)
at org.junit.runners.BlockJUnit4ClassRunner.runChild(BlockJUnit4ClassRunner.java:76)
at org.junit.runners.BlockJUnit4ClassRunner.runChild(BlockJUnit4ClassRunner.java:50)
at org.junit.runners.ParentRunner$3.run(ParentRunner.java:193)
at org.junit.runners.ParentRunner$1.schedule(ParentRunner.java:52)
at org.junit.runners.ParentRunner.runChildren(ParentRunner.java:191)
at org.junit.runners.ParentRunner.access$000(ParentRunner.java:42)
at org.junit.runners.ParentRunner$2.evaluate(ParentRunner.java:184)
at org.junit.runners.ParentRunner.run(ParentRunner.java:236)
at org.gradle.api.internal.tasks.testing.junit.JUnitTestClassExecuter.runTestClass(JUnitTestClassExecuter.java:105)

History

#1

Updated by Sergey Smolov over 3 years ago

  • Platform set to Windows x64
#2

Updated by Sergey Smolov over 3 years ago

  • Status changed from New to Resolved
  • % Done changed from 0 to 100

Fixed. Merged in master in eea00f3c.

#3

Updated by Sergey Smolov over 3 years ago

  • Status changed from Resolved to Verified
#4

Updated by Sergey Smolov almost 3 years ago

  • Status changed from Verified to Closed
  • Published in build set to 1.0.1-beta-170912

Also available in: Atom PDF