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Bug #7423

rnd_fsm.vhd: empty tst file

Added by Sergey Smolov about 4 years ago. Updated about 3 years ago.

Status:
Rejected
Priority:
High
Category:
Engine (Generator)
Target version:
Start date:
07/26/2016
Due date:
% Done:

0%

Estimated time:
Detected in build:
master
Platform:
Published in build:

Description

The RETGA-based test generation engine produces an empty test for the attached VHDL design.
Here is the tool cmdline:

<path-to-design>/rnd_fsm.vhd --target vhdl-testbench --engine efsm-test-generator --overwrite-existing --loop-limit 25


Files

rnd_fsm.vhd (570 Bytes) rnd_fsm.vhd Sergey Smolov, 07/26/2016 12:15 PM

History

#1

Updated by Sergey Smolov about 3 years ago

  • Status changed from New to Rejected

The efsm can't be tested as a single one. Rejected.

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