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Bug #6057
closedAssignment of instruction arguments
Start date:
06/17/2015
Due date:
% Done:
100%
Estimated time:
Detected in build:
svn
Platform:
Published in build:
2.2.7
Description
Say we have the following instruction
adds_sh_reg_32 w0, w0, w1, LSL, 0 do situation("IntegerOverflow") end
The first w0 is a rd (destination register); the other arguments are inputs.
Test base tries to assign all registers, and rd is attempted to be assigned to zero.
Processing situation IntegerOverflow for op adds_sh_reg_32(rd: REG_32, rn: REG_32, rm: REG_32, shift: #IMM, imm6: #IMM):[context=null, type=adds_sh_reg_32, root=true]... ... TestData [bindings={adds_sh_reg_32.rd=00000000000000000000000000000000, adds_sh_reg_32.rn=00001100000000000000000001000001, adds_sh_reg_32.rm=01110011111111111111111110111111}]
Correspondent assignment code does not try to assign the second register, thinking that the assignment of the first (input!) register is well enough.
Creating code to assign 00000000000000000000000000000000 to mode REG_32(i: #IMM = 0)... mode REG_32(i: #IMM = 0) has already been used to set up the processor state. No initialization code will be created. Creating code to assign 01110011111111111111111110111111 to mode REG_32(i: #IMM = 1)...
So we do not have the overflow situation.
movz w0, #0x0, LSL #16 movk w0, #0x0, LSL #0 movz w1, #0x73ff, LSL #16 movk w1, #0xffbf, LSL #0 adds w0, w0, w1, LSL #0
Updated by Andrei Tatarnikov over 9 years ago
- Status changed from New to Resolved
- % Done changed from 0 to 100
Solution (r3977): initializing code is not created for output registers. This code is redundant since value of output parameters are not used by the instruction and are overwritten. Thus, we reduce code size and avoid conflicts like described in this bug.
Updated by Alexander Kamkin over 9 years ago
- Status changed from Resolved to Closed
- Published in build set to 2.2.7
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