Project

General

Profile

Task #5872

HDL file meta info

Added by Sergey Smolov about 4 years ago. Updated about 4 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Category:
Engine (Parser)
Target version:
Start date:
04/22/2015
Due date:
% Done:

100%

Estimated time:
Detected in build:
svn
Published in build:
20150701

Description

Keep HDL file name at top-level module meta-information.

History

#1

Updated by Sergey Smolov about 4 years ago

  • Category set to 127
#2

Updated by Sergey Smolov about 4 years ago

  • Status changed from New to Open
#3

Updated by Sergey Smolov about 4 years ago

  • % Done changed from 0 to 50

I've implemented this for VHDL.

The Verilog parser will be improved soon.

#4

Updated by Sergey Smolov about 4 years ago

  • Status changed from Open to Resolved
  • % Done changed from 50 to 100

Done for VHDL.

#5

Updated by Sergey Smolov about 4 years ago

  • Status changed from Resolved to Verified
#6

Updated by Sergey Smolov about 4 years ago

  • Status changed from Verified to Closed
  • Published in build set to 20150701

Also available in: Atom PDF