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Task #5689

implement test-to-Verilog printer

Added by Sergey Smolov over 5 years ago. Updated almost 4 years ago.

Status:
Closed
Priority:
High
Assignee:
Category:
Engine (Printer)
Target version:
Start date:
03/05/2015
Due date:
% Done:

100%

Estimated time:
Detected in build:
master
Published in build:
20161025

Description

The printer should generate Verilog testbenches that can be simulated using ModelSim or Icarus simulator.

History

#1

Updated by Sergey Smolov over 5 years ago

  • Subject changed from [test][printer][verilog] implement test-to-Verilog printer to implement test-to-Verilog printer
  • Category set to Engine (Printer)
#2

Updated by Sergey Smolov over 4 years ago

  • Target version changed from 0.1 to 0.2
#3

Updated by Sergey Smolov over 4 years ago

  • Assignee changed from Igor Melnichenko to Sergey Smolov
  • Priority changed from Normal to High
#4

Updated by Sergey Smolov over 4 years ago

  • Status changed from New to Open
#5

Updated by Sergey Smolov over 4 years ago

  • Status changed from Open to Resolved
  • % Done changed from 0 to 100

Done in a8012d86.

#6

Updated by Sergey Smolov almost 4 years ago

  • Status changed from Resolved to Closed
  • Detected in build changed from svn to master
  • Published in build set to 20161025

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