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Task #5413

closed

[model][basis] add HdlType field to VariableData class

Added by Sergey Smolov about 10 years ago. Updated about 10 years ago.

Status:
Closed
Priority:
High
Assignee:
Category:
-
Target version:
Start date:
11/09/2014
Due date:
% Done:

100%

Estimated time:
Detected in build:
svn
Published in build:
r1213

Description

For CFG-based models translation into synthesizable HDL, an HdlType should be added into VariableData class.
The field semantics is: the variable type as it is described in the source HDL design.
For type keeping a String can be used.

Actions #1

Updated by Sergey Smolov about 10 years ago

  • Status changed from New to Open
Actions #2

Updated by Sergey Smolov about 10 years ago

  • Status changed from Open to Resolved
  • % Done changed from 0 to 100
  • Published in build set to r1213

Частный случай более общей задачи #5416.
Сделано для VHDL-описаний (для Verilog требуется доработать парсер).

Actions #3

Updated by Sergey Smolov about 10 years ago

  • Status changed from Resolved to Closed
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