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Task #4093

[mmu] Функции доступа к памяти

Added by Alexander Kamkin over 7 years ago. Updated over 5 years ago.

Status:
Rejected
Priority:
High
Assignee:
Category:
-
Target version:
Start date:
04/10/2013
Due date:
% Done:

0%

Estimated time:
Detected in build:
svn
Published in build:

Description

Предложить способ описания функций доступа к памяти (LoadMemory, StoreMemory, TranslateAddress) в синтаксе Sim-nML.

History

#1

Updated by Taya Sergeeva over 7 years ago

Например,

Situation                                
{
    if (TLB(VA) = hit)
    {
        load TLB.Line:PNF;
    }
    then 
        AddTrans(VA:data,PA)                // address translation function: from VA to PA
        {
            PA = PNF::VA<6..1>;
        }   

        if(L1(PA) = hit) 
        {
            LoadMemory (L1.Line), word;                        // loading operation
        }        

        then
            StoreMemory (register := word);                   // writing operation

        else                                                  // L1 = miss
        {
            if(L2(PA) = hit)
            {
                LoadMemory (L2.Line), word;
            }
            then
                StoreMemory (register := word);

            else                            // L2 = miss
            {
                throw L2Missexception();
            }
            endif

        throw L1Missexception();
        }

    else                                     // TLB(VA) = miss
    {
        throw new MissException();
    }
}

Функция трансляции адреса:

op AddTrans           
{
    PA = VA:data;            // Data translation from VirtAddr into PhysAddr 
}

#2

Updated by Alexander Kamkin over 7 years ago

  • Assignee changed from Taya Sergeeva to Andrei Tatarnikov

Адрей, можешь оценить соответствие синтаксису Sim-nML?

#3

Updated by Andrei Tatarnikov over 7 years ago

Если оценивать количественно, то соответствие около 5%. Список несоответствий буду составлять завтра. Их будет много, почти к каждой строке кода есть вопросы.

#4

Updated by Taya Sergeeva over 7 years ago

  • Assignee changed from Andrei Tatarnikov to Taya Sergeeva
let IS_HIT_ACT = 0
let   LOAD_ACT = IS_HIT_ACT + 1
let  STORE_ACT = LOAD_ACT + 1

type action_t = card(4)

type va_t = card(16)
type pa_t = card(16)
type word = card(32)

var va[1, va_t]
var pa[1, pa_t]

op TLBFakeOp()

var TLBAction[action_t]
var TLBIsHit[card(1)]
var TLBInput[va_t]
var TLBOut[pa_t]

op L1FakeOp()

var isL1Hit[card(1)]
var L1Input[pa_t]

op L2FakeOp()

op address_conversion(vaddr: va_t, paddr: pa_t, TLB: TLBFakeOp)
action = {
    TLBInput = vaddr;

    TLBAction = IS_HIT_ACT;
    TLB.action;

    if TLBIsHit != 0 then
       TLBAction = LOAD_ACT;
       TLB.action;

       pa = TLBOut;
       // get PA from TLB
    else
       /// search in page table
       pa = va;
    endif;
}

op LOAD (/* in */ paddr: pa_t, /* out */ data: word, L1: L1FakeOp)
action = {
    L1Input = paddr;
    L1.action;

    if isL1Hit != 0 then
      // data = L1.load(pa) 
    else
/*
       if L2.isHit(pa) then
           data = L2.load(pa)  
       else 
           data = OP_MEM.load(pa)
       endif;
*/  
    endif;
}

op STORE (/* in */ paddr:pa_t, /* in */ data: word, L1: L1FakeOp, L2: L2FakeOp)
action = {
    L1.action;
    L2.action;
/*
    if L1.isHit(pa) then
         if L2.isHit
             OP_MEM.store(pa, data)
        else
             OP_MEM.store(pa, data)
             L2.store(pa, data)
        endif;
    else
        L1.store(pa, data)
        L2.store(pa, data)
        OP_MEM.store(pa, data)
    endif;
*/
}

mode stub() = 0x0
action = {}

op instruction (x : pa_t)

    action = {

    }

#5

Updated by Alexander Kamkin over 7 years ago

Лучше вместо переменной типа XXXAction сделать несколько атрибутов в операции XXX.

Например,

TLBAction = LOAD_ACT;
TLB.action;

лучше заменить на

TLB.load

Код, приведенный ниже, непонятен. Если нет попадания в TLB, просто генерируется прерывание (в MIPS оно называется TLBMiss). Если есть попадание, но бит V=0, генерируется прерывание TLBInvalid.

    ...
    else
       /// search in page table
       pa = va;
    endif;
#6

Updated by Alexander Kamkin over 7 years ago

Как связаны TLB и TLBFakeOp ?

#7

Updated by Alexander Kamkin over 6 years ago

  • Priority changed from Normal to High

11 месяцев - слишком долго для такой задачи.

Таня, не забывай писать отчеты.

#8

Updated by Taya Sergeeva over 6 years ago

type word = card(32)
type hit = card(2)

type va_t = card(32)
type pa_t = card(32)
//type mem_t = card(1024)

var va[1, va_t]
var pa[1, pa_t]
var data[1, word]

var TLB_Hit[1, hit]
var L1_Hit[1, hit]
var L2_Hit[1, hit]
var OP_MEM_Hit[1, hit]

op TLB_access(pa)
action = 
{
    TLB_Hit;   
}

op L1_access(pa)
action = 
{
    L1_Hit;
}

op L2_access(pa)
action = 
{
    L2_Hit; 
}

op OP_MEM_access(pa)
action = 
{
    OP_MEM_Hit;
}

op address_conv(pa)
action = 
{
    pa = va;
}

op LOAD(pa : pa_t, data : word)
action = 
{
    TLB_access.action(pa);
        if TLB_Hit then
            L1_access.action;
            if L1_Hit then
               address_conv.action;
            else
                L2_access.action;
                if L2_Hit then
                  address_conv.action;
                else
                    OP_MEM_access.action(pa);
                    address_conv.action;
                    // if miss - search the data in operation memory
                endif;
            endif;
        else
            TLB_exception; 
        endif;
}

op STORE(pa : pa_t, data : word)
action = 
{
    L1_access.action
    if L1_Hit then
        L2_access.action
        if L2_Hit then
            OP_MEM.store(pa, data)
        else
            L2.store(pa, data)
            OP_MEM.store(pa, data)
        endif;
    else
        L1.store(pa, data)
        L2.store(pa, data)
        OP_MEM.store(pa, data)
    endif;
  }
#9

Updated by Alexander Kamkin over 6 years ago

  • Target version set to 2.3
#10

Updated by Alexander Kamkin over 5 years ago

  • Status changed from New to Rejected

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