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Bug #10382

java.lang.IllegalArgumentException: expression=(BVREPEAT test.uut._saxi_maskwidth 1)

Added by Sergey Smolov 10 months ago. Updated 6 months ago.

Status:
Closed
Priority:
Normal
Assignee:
Target version:
Start date:
06/18/2020
Due date:
% Done:

100%

Estimated time:
Detected in build:
git
Platform:
Published in build:
0.1.3-beta-201002

Description

java.lang.IllegalArgumentException: expression=(BVREPEAT test.uut._saxi_maskwidth 1)
    at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:53)
    at ru.ispras.fortress.util.InvariantChecks.checkNotNull(InvariantChecks.java:109)
    at ru.ispras.verilog.parser.elaborator.VerilogElaborator.defineParameter(VerilogElaborator.java:1074)
    at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariableAndBinding(VerilogElaborator.java:526)
    at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariablesAndBindings(VerilogElaborator.java:910)
    at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariablesAndBindings(VerilogElaborator.java:883)
    at ru.ispras.verilog.parser.elaborator.VerilogElaborator.expand(VerilogElaborator.java:330)
    at ru.ispras.verilog.parser.elaborator.VerilogElaborator.start(VerilogElaborator.java:231)
    at ru.ispras.verilog.parser.VerilogSyntaxBackends.start(VerilogSyntaxBackends.java:55)
    at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:212)
    at ru.ispras.verilog.parser.sample.VerilogPrinter.main(VerilogPrinter.java:45)
    at ru.ispras.verilog.parser.sample.VerilogPrinterTestCase.runTest(VerilogPrinterTestCase.java:50)
#1

Updated by Sergey Smolov 10 months ago

Run ru.ispras.verilog.parser.sample.Bug10382TestCase to reproduce the bug.

#2

Updated by Sergey Smolov 10 months ago

  • % Done changed from 0 to 100
  • Assignee set to Sergey Smolov
  • Status changed from New to Resolved
#3

Updated by Sergey Smolov 6 months ago

  • Published in build set to 0.1.3-beta-201002
  • Status changed from Resolved to Closed

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