Bug #10237
ru.ispras.verilog.parser.VerilogTexas97TestSuite#runTest_Pi_Bus_single_master_main2: ERROR: Cycle inclusion at: '...bus.v'
Start date:
04/08/2020
Due date:
% Done:
0%
Estimated time:
Detected in build:
git
Platform:
Published in build:
0.1.3-beta-201002
Description
The tool reports about cycle inclusion, but the described file does not contain includes at all.
Run ru.ispras.verilog.parser.VerilogTexas97TestSuite#runTest_Pi_Bus_single_master_main2 to reproduce it.
History
Updated by Sergey Smolov 4 months ago
- Published in build set to 0.1.3-beta-201002
- Status changed from Verified to Closed
junit: test case to reproduce bug (#10237)
Signed-off-by: Sergey Smolov <smolov@ispras.ru>