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Feature #10060

closed

Support SVA properties in CFG model

Added by Sergey Smolov about 4 years ago. Updated 12 months ago.

Status:
Closed
Priority:
High
Assignee:
Category:
Model
Target version:
Start date:
01/21/2020
Due date:
% Done:

100%

Estimated time:
Published in build:
1.1.3-beta-230504

Description

Translate SvaAssertionStatement objects of Verilog Translator representation into equivalent CFG objects.

SvaAssertionStatement objects can be of the following kinds:

1. IMMEDIATE - blocking assertions inside processes
2. CONCURRENT - specific processes (ASSERT/ASSUME)

Actions #1

Updated by Sergey Smolov about 4 years ago

  • Target version set to 1.2
Actions #2

Updated by Sergey Smolov about 4 years ago

  • Priority changed from Normal to High
Actions #3

Updated by Sergey Smolov about 4 years ago

  • Status changed from New to Resolved
  • % Done changed from 0 to 100

Properties are added to CFG model.

Actions #4

Updated by Sergey Smolov 12 months ago

  • Status changed from Resolved to Closed
  • Published in build set to 1.1.3-beta-230504
Actions

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