Open-Source Projects: Issueshttps://forge.ispras.ru/https://forge.ispras.ru/favicon.ico?16490126692020-10-04T06:54:18ZOpen-Source Projects
Redmine Verilog Translator - Bug #10513 (New): macOS related line endings at Verilog moduleshttps://forge.ispras.ru/issues/105132020-10-04T06:54:18ZSergey Smolovsmolov@ispras.ru
<p>Verilog Translator does not support macOS related line endings ('\r') at Verilog modules. Is it ok for the tool?</p> Verilog Translator - Bug #10512 (New): ADDA162H90A_atop.v line 120:47 mismatched input ':' expect...https://forge.ispras.ru/issues/105122020-10-02T08:46:35ZSergey Smolovsmolov@ispras.ru
<pre>
RROR: L:\work\veritrans\src\test\verilog\hdl-benchmarks\hdl\iwls05\faraday\rtl\DSP\hdl\CODEC\FXADDA162H90A\ADDA162H90A_atop.v line 120:47 mismatched input ':' expecting RPAREN
ERROR: L:\work\veritrans\src\test\verilog\hdl-benchmarks\hdl\iwls05\faraday\rtl\DSP\hdl\CODEC\FXADDA162H90A\ADDA162H90A_atop.v line 157:47 mismatched input ':' expecting RPAREN
ERROR: ru\ispras\verilog\parser\grammar\VerilogTreeBuilder.g: node from after line 117:36 mismatched tree node: <mismatched token: [@2436,3042:3042=':',<19>,120:47], resync=$width(posedgedac_phase_check,400.00:500.00:900.00,0,> expecting <UP>
ERROR: ru\ispras\verilog\parser\grammar\VerilogTreeBuilder.g: node from after line 117:36 mismatched tree node: AST_ATTRIBUTES expecting <UP>
ERROR: ru\ispras\verilog\parser\grammar\VerilogTreeBuilder.g: node from after line 117:36 mismatched tree node: <unexpected: [@2444,3089:3089=')',<276>,120:94], resync=n_flag_dac_phase_overlape> expecting <UP>
</pre> Verilog Translator - Bug #10510 (New): ERROR: [Internal] Bit vector sizes do not match: 32 != 2.https://forge.ispras.ru/issues/105102020-10-01T15:35:04ZSergey Smolovsmolov@ispras.ru
<pre>
java.lang.IllegalArgumentException: Bit vector sizes do not match: 32 != 2.
at ru.ispras.fortress.data.types.bitvector.BitVectorMath.checkEqualSize(BitVectorMath.java:1255)
at ru.ispras.fortress.data.types.bitvector.BitVectorMath.transform(BitVectorMath.java:1231)
at ru.ispras.fortress.data.types.bitvector.BitVectorMath.add(BitVectorMath.java:869)
at ru.ispras.fortress.data.types.bitvector.BitVectorMath.sub(BitVectorMath.java:888)
at ru.ispras.verilog.parser.interpreter.VerilogOperations$10.calculate(VerilogOperations.java:222)
at ru.ispras.fortress.calculator.OperationGroup.calculate(OperationGroup.java:141)
at ru.ispras.fortress.transformer.Reducer$OperationRule.apply(Reducer.java:147)
at ru.ispras.fortress.transformer.NodeTransformer.applyRule(NodeTransformer.java:173)
at ru.ispras.fortress.transformer.NodeTransformer.updateNode(NodeTransformer.java:183)
at ru.ispras.fortress.transformer.NodeTransformer.onOperationEnd(NodeTransformer.java:231)
at ru.ispras.fortress.expression.ExprTreeWalker.visitOperation(ExprTreeWalker.java:173)
at ru.ispras.fortress.expression.ExprTreeWalker.visitNode(ExprTreeWalker.java:123)
at ru.ispras.fortress.expression.ExprTreeWalker.visitOperation(ExprTreeWalker.java:160)
at ru.ispras.fortress.expression.ExprTreeWalker.visitNode(ExprTreeWalker.java:123)
at ru.ispras.fortress.expression.ExprTreeWalker.visit(ExprTreeWalker.java:93)
at ru.ispras.fortress.transformer.NodeTransformer.walk(NodeTransformer.java:54)
at ru.ispras.fortress.transformer.Reducer.reduce(Reducer.java:183)
at ru.ispras.verilog.parser.interpreter.VerilogCalculator.evaluate(VerilogCalculator.java:67)
at ru.ispras.verilog.parser.elaborator.VerilogElaborator.evaluate(VerilogElaborator.java:1161)
at ru.ispras.verilog.parser.elaborator.VerilogElaborator.defineParameter(VerilogElaborator.java:1073)
at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariableAndBinding(VerilogElaborator.java:526)
at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariablesAndBindings(VerilogElaborator.java:910)
at ru.ispras.verilog.parser.elaborator.VerilogElaborator.createVariablesAndBindings(VerilogElaborator.java:883)
at ru.ispras.verilog.parser.elaborator.VerilogElaborator.expand(VerilogElaborator.java:330)
at ru.ispras.verilog.parser.elaborator.VerilogElaborator.start(VerilogElaborator.java:231)
at ru.ispras.verilog.parser.VerilogSyntaxBackends.start(VerilogSyntaxBackends.java:55)
at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:212)
at ru.ispras.verilog.parser.sample.VerilogPrinter.main(VerilogPrinter.java:45)
at ru.ispras.verilog.parser.util.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:62)
at ru.ispras.verilog.parser.VerilogIwlsTestSuite.runTest_risc_defgh(VerilogIwlsTestSuite.java:1692)
</pre> Verilog Translator - Bug #10509 (New): ERROR: [Internal] 0 must be > 0https://forge.ispras.ru/issues/105092020-10-01T15:15:47ZSergey Smolovsmolov@ispras.ru
<pre>
ERROR: [Internal] 0 must be > 0
java.lang.IllegalArgumentException: 0 must be > 0
at ru.ispras.fortress.util.InvariantChecks.checkGreaterThanZero(InvariantChecks.java:159)
at ru.ispras.fortress.data.types.bitvector.BitVector.newEmpty(BitVector.java:381)
at ru.ispras.verilog.parser.model.basis.VerilogLiteral.<init>(VerilogLiteral.java:188)
at ru.ispras.verilog.parser.model.basis.VerilogLiteral.parseString(VerilogLiteral.java:55)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_string(VerilogTreeBuilder.java:7916)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_primary(VerilogTreeBuilder.java:6628)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_operation(VerilogTreeBuilder.java:6502)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_expression(VerilogTreeBuilder.java:6356)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_task_statement(VerilogTreeBuilder.java:4716)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4393)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_block_statement(VerilogTreeBuilder.java:5465)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_statement(VerilogTreeBuilder.java:4473)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_process(VerilogTreeBuilder.java:3514)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_item(VerilogTreeBuilder.java:1214)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_module(VerilogTreeBuilder.java:918)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_unit(VerilogTreeBuilder.java:765)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.ast_root(VerilogTreeBuilder.java:713)
at ru.ispras.verilog.parser.grammar.VerilogTreeBuilder.startRule(VerilogTreeBuilder.java:663)
at ru.ispras.verilog.parser.VerilogFrontend.startBuilder(VerilogFrontend.java:455)
at ru.ispras.verilog.parser.VerilogFrontend.startBuilder(VerilogFrontend.java:460)
at ru.ispras.verilog.parser.VerilogFrontend.start(VerilogFrontend.java:486)
at ru.ispras.verilog.parser.VerilogFrontend.start(VerilogFrontend.java:490)
at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:206)
at ru.ispras.verilog.parser.sample.VerilogPrinter.main(VerilogPrinter.java:45)
at ru.ispras.verilog.parser.util.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:62)
at ru.ispras.verilog.parser.VerilogIwlsTestSuite.runTest_usbf_top(VerilogIwlsTestSuite.java:4417)
</pre> Verilog Translator - Bug #10508 (New): ERROR: [Internal] Java heap spacehttps://forge.ispras.ru/issues/105082020-10-01T11:33:03ZSergey Smolovsmolov@ispras.ru
<p>The following test cases fall with "ERROR: [Internal] Java heap space":</p>
<p><strong>ru.ispras.verilog.parser.VerilogIwlsTestSuite#runTest_iscas_s35932<br />ru.ispras.verilog.parser.VerilogIwlsTestSuite#runTest_iscas_s38417<br />ru.ispras.verilog.parser.VerilogIwlsTestSuite#runTest_iscas_s15850</strong></p> Verilog Translator - Bug #10505 (New): ERROR: [Internal] 11 must be within range [0, 1)https://forge.ispras.ru/issues/105052020-09-30T10:51:18ZSergey Smolovsmolov@ispras.ru
<pre>
java.lang.IndexOutOfBoundsException: 11 must be within range [0, 1)
at ru.ispras.fortress.util.InvariantChecks.checkBounds(InvariantChecks.java:190)
at ru.ispras.fortress.data.types.bitvector.BitVector.field(BitVector.java:309)
at ru.ispras.verilog.parser.interpreter.VerilogOperations$34.calculate(VerilogOperations.java:745)
at ru.ispras.fortress.calculator.OperationGroup.calculate(OperationGroup.java:141)
at ru.ispras.fortress.transformer.Reducer$OperationRule.apply(Reducer.java:147)
at ru.ispras.fortress.transformer.NodeTransformer.applyRule(NodeTransformer.java:173)
at ru.ispras.fortress.transformer.NodeTransformer.updateNode(NodeTransformer.java:183)
at ru.ispras.fortress.transformer.NodeTransformer.onOperationEnd(NodeTransformer.java:231)
at ru.ispras.fortress.expression.ExprTreeWalker.visitOperation(ExprTreeWalker.java:173)
at ru.ispras.fortress.expression.ExprTreeWalker.visitNode(ExprTreeWalker.java:123)
at ru.ispras.fortress.expression.ExprTreeWalker.visit(ExprTreeWalker.java:93)
at ru.ispras.fortress.transformer.NodeTransformer.walk(NodeTransformer.java:54)
at ru.ispras.fortress.transformer.Reducer.reduce(Reducer.java:183)
at ru.ispras.fortress.transformer.Reducer.reduce(Reducer.java:248)
at ru.ispras.verilog.parser.interpreter.VerilogCalculator.reduce(VerilogCalculator.java:50)
at ru.ispras.verilog.parser.transformer.VerilogTransformerOperation.transform(VerilogTransformerOperation.java:66)
at ru.ispras.verilog.parser.transformer.VerilogTransformerComposite.transform(VerilogTransformerComposite.java:57)
at ru.ispras.verilog.parser.transformer.VerilogTransformer.transform(VerilogTransformer.java:214)
at ru.ispras.verilog.parser.transformer.VerilogTransformer.transform(VerilogTransformer.java:226)
at ru.ispras.verilog.parser.transformer.VerilogTransformer.transform(VerilogTransformer.java:245)
at ru.ispras.verilog.parser.transformer.VerilogTransformer.onAssignStatementBegin(VerilogTransformer.java:84)
at ru.ispras.verilog.parser.walker.VerilogNodeVisitor$3.onBegin(VerilogNodeVisitor.java:285)
at ru.ispras.verilog.parser.walker.VerilogNodeVisitor.onBegin(VerilogNodeVisitor.java:770)
at ru.ispras.verilog.parser.core.TreeWalker.onBegin(TreeWalker.java:102)
at ru.ispras.verilog.parser.core.TreeWalker.start(TreeWalker.java:81)
at ru.ispras.verilog.parser.transformer.VerilogTransformer.run(VerilogTransformer.java:55)
at ru.ispras.verilog.parser.elaborator.VerilogInstantiator.instantiate(VerilogInstantiator.java:198)
at ru.ispras.verilog.parser.elaborator.VerilogInstantiator.instantiateProcess(VerilogInstantiator.java:144)
at ru.ispras.verilog.parser.elaborator.VerilogDesign$1$1.next(VerilogDesign.java:212)
at ru.ispras.verilog.parser.elaborator.VerilogDesign$1$1.next(VerilogDesign.java:199)
at ru.ispras.verilog.parser.backends.design.typecast.VerilogTypeCaster.start(VerilogTypeCaster.java:43)
at ru.ispras.verilog.parser.VerilogDesignBackends.start(VerilogDesignBackends.java:55)
at ru.ispras.verilog.parser.VerilogTranslator.start(VerilogTranslator.java:219)
at ru.ispras.verilog.parser.sample.VerilogPrinter.main(VerilogPrinter.java:45)
at ru.ispras.verilog.parser.util.VerilogBenchmarkTest.runTest(VerilogBenchmarkTest.java:62)
at ru.ispras.verilog.parser.VerilogIwlsTestSuite.runTest_opencores_pci_target_unit(VerilogIwlsTestSuite.java:3941)
</pre> MicroTESK - Task #10304 (New): deprecation warnings via compilationhttps://forge.ispras.ru/issues/103042020-04-23T12:19:57ZSergey Smolovsmolov@ispras.ru
<pre>
> Task :compileJava
/srv/****/workspace/MicroTESK/src/main/java/core/ru/ispras/microtesk/SysUtils.java:122: warning: [deprecation] newInstance() in Class has been deprecated
return cl.loadClass(className).newInstance();
^
where T is a type-variable:
T extends Object declared in class Class
/srv/****/workspace/MicroTESK/src/main/java/core/ru/ispras/microtesk/SysUtils.java:148: warning: [deprecation] newInstance() in Class has been deprecated
return (Plugin) pluginClass.newInstance();
^
where T is a type-variable:
T extends Object declared in class Class
/srv/****/workspace/MicroTESK/src/main/java/core/ru/ispras/microtesk/test/sequence/GeneratorNitems.java:78: warning: [unchecked] unchecked method invocation: method copyAll in class SharedObject is applied to given types
return SharedObject.copyAll((List) value);
^
required: List<T>
found: List
where T is a type-variable:
T extends SharedObject<T> declared in method <T>copyAll(List<T>)
/srv/****/workspace/MicroTESK/src/main/java/core/ru/ispras/microtesk/test/sequence/GeneratorNitems.java:78: warning: [unchecked] unchecked conversion
return SharedObject.copyAll((List) value);
^
required: List<T>
found: List
where T is a type-variable:
T extends SharedObject<T> declared in method <T>copyAll(List<T>)
/srv/****/workspace/MicroTESK/src/main/java/core/ru/ispras/microtesk/test/sequence/GeneratorNitems.java:78: warning: [unchecked] unchecked conversion
return SharedObject.copyAll((List) value);
^
required: List<T>
found: List
where T is a type-variable:
T extends Object declared in class GeneratorNitems
/srv/****/workspace/MicroTESK/src/main/java/core/ru/ispras/microtesk/test/sequence/GeneratorConfig.java:179: warning: [deprecation] newInstance() in Class has been deprecated
return type.newInstance();
^
where T is a type-variable:
T extends Object declared in class Class
6 warnings
</pre> MicroTESK - Bug #10121 (Open): technical output printing at 'compile.sh' script running with '--h...https://forge.ispras.ru/issues/101212020-02-13T14:42:42ZSergey Smolovsmolov@ispras.ru
<pre>
$ ./bin/compile.sh --help
Buildfile: /home/ssedai/Downloads/microtesk-2.5.1-beta-200127/bin/build.xml
clean:
[delete] Deleting directory /home/ssedai/Downloads/microtesk-2.5.1-beta-200127/gen
BUILD SUCCESSFUL
Total time: 0 seconds
usage: [options] Files to be processed
-ad,--arch-dirs <arg> Home directories for tested architectures [works with -g],
default=""
-ae,--asserts-enabled Enables assertion checks during simulation [works with -g],
default=false
-af,--align-format <arg> Alignment directive format [works with -g], default=".align %d"
-aff,--align-format2 <arg> Alignment directive format [works with -g], default=".align %d,
0x%02x"
-baf,--byte-align-format <arg> Byte alignment directive format [works with -g], default=".balign
%d"
-baff,--byte-align-format2 <arg> Byte alignment directive format [works with -g], default=".balign
%d, 0x%02x"
-bel,--branch-exec-limit <arg> Maximum execution count for an instruction [works with -g],
default=100
-bfbe,--binary-file-big-endian Use big endian for binary files, default=false
-bfe,--binary-file-extension <arg> Binary file extension [works with -g], default="bin"
-btn,--base-template-name <arg> Name of test template base class [works with -gt], default=""
-btp,--base-template-path <arg> Path to test template base class file [works with -gt],
default=""
-cd,--comments-debug Enables generation of detailed comments, depends on
--comments-enabled [works with -g], default=false
-ce,--comments-enabled Enables generation of comments [works with -g], default=false
-cfe,--code-file-extension <arg> Output file extension [works with -g], default="asm"
-cfp,--code-file-prefix <arg> Output file prefix [works with -g], default="test"
-cl,--coverage-log Enables coverage trace generation [works with -g], default=false
-ct,--comment-token <arg> Single-line comment text [works with -g], default="//"
-cte,--comment-token-end <arg> Text that ends a multiline comment [works with -g], default="*/"
-cts,--comment-token-start <arg> Text that starts a multiline comment [works with -g],
default="/*"
-d,--disassemble Disassembles binary files, default=false
-dfe,--data-file-extension <arg> Data file extension [works with -g], default="asm"
-dfp,--data-file-prefix <arg> Data file prefix [works with -g], default="data"
-dp,--debug-print Enables printing detailed debug messages [works with -g],
default=false
-dsk,--data-section-keyword <arg> Data section directive [works with -g], default=".data"
-dtd,--default-test-data Enables generation of default test data [works with -g],
default=false
-ed,--extension-dir <arg> Directory that stores user-defined Java code [works with -t],
default=""
-efp,--except-file-prefix <arg> Exception handler file prefix [works with -g],
default="test_except"
-fde,--fetch-decode-enabled Enables allocation, fetching and decoding of instructions [works
with -g], default=false
-g,--generate Generates test programs, default=false
-gb,--generate-binary Enables generating binary files (limited functionality for
debugging) [works with -g], default=false
-gf,--global-format <arg> Global directive format [works with -g], default=".globl %s"
-gt,--generate-template Generates test templates, default=false
-h,--help Shows help message, default=false
-i,--include <arg> Directory that stores include files [works with -t], default=""
-ii,--ignored-instructions <arg> Instructions to be ignored [works with -gt], default=""
-in,--instance-number <arg> Number of processing element instances [works with -g], default=1
-it,--indent-token <arg> Indentation text [works with -g], default="
"
-jtpm,--jruby-thread-pool-max <arg>JRuby: maximum number of threads to allow in pool [works with
-g], default=2147483647
-mn,--model-name <arg> Name of the constructed microprocessor model [works with -t],
default=""
-ns,--no-simulation Disables simulation of generated code [works with -g],
default=false
-od,--output-dir <arg> Directory to place generated files, default="./output"
-of,--origin-format <arg> Origin directive format [works with -g], default=".org 0x%x"
-off,--option-format <arg> Option directive format [works with -g], default=".option %s"
-paf,--power2-align-format <arg> Power of 2 alignment directive format [works with -g],
default=".p2align %d"
-paff,--power2-align-format2 <arg> Power of 2 alignment directive format [works with -g],
default=".p2align %d, 0x%02x"
-pll,--program-length-limit <arg> Maximum program length [works with -g], default=1000
-rd,--reserve-dependencies Enables automated reservation of registers that have dependencies
[works with -g], default=false
-re,--reserve-explicit Enables marking all explicitly specified registers as used [works
with -g], default=false
-ri,--rev-id <arg> Identifier of revision to be used, default=""
-rl,--rate-limit <arg> Minimum generation rate [works with -g], default=0
-rs,--random-seed <arg> Seed for randomizer [works with -g], default=0
-s,--solver <arg> Constraint solver engine to be used, default="cvc4"
-sc,--self-checks Enables inserting self-checks into test programs [works with -g],
default=false
-sd,--solver-debug Enables debug mode for SMT solvers [works with -g], default=false
-se,--symbolic-execute Performs symbolic execution, default=false
-st,--separator-token <arg> Text used to create separators [works with -g], default="="
-t,--translate Translates formal specifications, default=false
-tl,--tracer-log Enables generation of Tracer logs for simulation [works with -g],
default=false
-tll,--trace-length-limit <arg> Maximum execution trace length [works with -g], default=1000
-ts,--time-statistics Enables printing time statistics [works with -g], default=false
-tsk,--text-section-keyword <arg> Text section directive [works with -g], default=".text"
-tt,--transform-trace Transforms traces into templates, default=false
-v,--verbose Enables printing diagnostic messages, default=false
-wf,--weak-format <arg> Weak directive format [works with -g], default=".weak %s"
Buildfile: /home/ssedai/Downloads/microtesk-2.5.1-beta-200127/bin/build.xml
build:
[mkdir] Created dir: /home/ssedai/Downloads/microtesk-2.5.1-beta-200127/gen/bin
BUILD FAILED
/home/ssedai/Downloads/microtesk-2.5.1-beta-200127/bin/build.xml:47: srcdir "/home/ssedai/Downloads/microtesk-2.5.1-beta-200127/gen/src/java" does not exist!
</pre> MicroTESK - Bug #10102 (Closed): incorrect ld scripts for x86 test programshttps://forge.ispras.ru/issues/101022020-02-06T10:22:06ZSergey Smolovsmolov@ispras.ru
<p>For x86 test programs emulation on QEMU4V, the following approach can be used. Test program should be compiled as <em>bootable drive</em> and run on QEMU4V ("-hda" option). The following linker script should be generated:<br /><pre>
SECTIONS
{
/* The BIOS loads the code from the disk to this location.
* We must tell that to the linker so that it can properly
* calculate the addresses of symbols we might jump to.
*/
. = 0x7c00;
.text :
{
__start = .;
*(.text)
/* Place the magic boot bytes at the end of the first 512 sector of the disk. */
. = 0x1FE;
SHORT(0xAA55)
}
}
</pre></p>
<p>Now ld scripts look as follows:<br /><pre>
ENTRY(_start)
SECTIONS
{
. = 0x7C00;
.text : { *(".text")}
. = 0x8000;
.data : { *(".data")}
.bss : { *(".bss COMMON")}
. = ALIGN(8);
. = . + 0x10000;
stack_top = .;
}
</pre></p> MicroTESK - Bug #10094 (Closed): strange common code at LinkerScript.stghttps://forge.ispras.ru/issues/100942020-02-04T14:06:08ZSergey Smolovsmolov@ispras.ru
<p>The StringTemplate description for ld scripts looks as follows (<a class="external" href="https://forge.ispras.ru/projects/microtesk/repository/microtesk/revisions/master/entry/src/main/resources/core/stg/LinkerScript.stg">https://forge.ispras.ru/projects/microtesk/repository/microtesk/revisions/master/entry/src/main/resources/core/stg/LinkerScript.stg</a>):<br /><pre>
linker_script(
time,
section_ids,
section_vas,
section_flags
) ::= <<
<linker_script_header(time)>
ENTRY(_start)
SECTIONS
{
<section_ids, section_vas, section_flags : {id, va, fl | <section(id, va, fl)>}; separator="\n">
. = ALIGN(8);
. = . + 0x10000;
stack_top = .;
}
>>
section(id, va, common) ::= <<
<if(va)>. = <va>;<\n><endif><id> : { *("<id><if(common)> COMMON<endif>")}
>>
</pre></p>
<p>The following part is common for all linker scripts that are generated by the MicroTESK:<br /><pre>
. = ALIGN(8);
. = . + 0x10000;
stack_top = .;
</pre></p>
<p>It seems suspicious that this code is repeated for all ISAs.</p> MicroTESK - Feature #10074 (New): option that stores boot obj at the generated ld scripthttps://forge.ispras.ru/issues/100742020-01-27T12:51:20ZSergey Smolovsmolov@ispras.ru
<p>Generally speaking, assembler program for boot loader should not be included into the resulting binary for test program. However, in some cases (for example, our JUnit test cases for MiniMIPS model) it could be useful.</p>
<p>So, boot object and it's address should be mentioned in the <em>ld</em> script that is generated by the MicroTESK, when the specific option is enabled.</p>
<p>Here is the working example of <em>ld</em> script that is runnable on QEMU: <a class="external" href="https://forge.ispras.ru/projects/microtesk-book/repository/418/revisions/master/entry/examples/link_qemu.ls">https://forge.ispras.ru/projects/microtesk-book/repository/418/revisions/master/entry/examples/link_qemu.ls</a></p> MicroTESK - Bug #10069 (New): cpu.nml Error: Internal error: context [/Isa] 1:8 attribute file is...https://forge.ispras.ru/issues/100692020-01-24T12:11:55ZSergey Smolovsmolov@ispras.ru
<p>Upon building, the following error appears in Gradle log:<br /><pre>
> Task :translateCpu
Translating: src/main/arch/demo/cpu/model/cpu.nml
Model name: cpu
Included: src/main/arch/demo/cpu/model/cpu.nml
Error: Internal error: context [/Isa] 1:8 attribute file isn't defined
</pre></p> MicroTESK - Bug #9436 (Closed): ru.ispras.microtesk.mmu.translator.GeneralTestCase: java.lang.Ill...https://forge.ispras.ru/issues/94362019-01-17T14:45:54ZSergey Smolovsmolov@ispras.ru
<pre>
:test
Translating: ./src/test/mmu/general.mmu
Model name: general
Included: ./src/test/mmu/general.mmu
Included: address.mmu
java.lang.IllegalArgumentException
at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:53)
at ru.ispras.fortress.util.InvariantChecks.checkTrue(InvariantChecks.java:38)
at ru.ispras.fortress.util.InvariantChecks.checkNotNull(InvariantChecks.java:95)
at ru.ispras.microtesk.mmu.translator.MmuTreeWalkerBase.assignContext(MmuTreeWalkerBase.java:199)
at ru.ispras.microtesk.mmu.translator.MmuTranslator.start(MmuTranslator.java:121)
at ru.ispras.microtesk.translator.Translator.translate(Translator.java:201)
at ru.ispras.microtesk.translator.TranslatorTest.translate(TranslatorTest.java:79)
at ru.ispras.microtesk.mmu.translator.GeneralTestCase.test(GeneralTestCase.java:26)
</pre>
<p>The exception is thrown, but the test passes</p> MicroTESK - Bug #9063 (Closed): microtesk/src/main/java/core/ru/ispras/microtesk/utils/PropertyMa...https://forge.ispras.ru/issues/90632018-07-05T07:28:46ZSergey Smolovsmolov@ispras.ru
<p>The following warning appears at the compilation process:<br /><pre><code class="text syntaxhl" data-language="text">Note: /home/ssedai/projects/microtesk/src/main/java/core/ru/ispras/microtesk/utils/PropertyMap.java uses unchecked or unsafe operations.
Note: Recompile with -Xlint:unchecked for details.
</code></pre></p> MicroTESK - Task #7564 (Closed): "How to build MicroTESK" guide for developers in project Wikihttps://forge.ispras.ru/issues/75642016-09-09T14:55:39ZSergey Smolovsmolov@ispras.ru