public final class VerilogCallCollector extends VerilogTransformer
VerilogCallCollector
collects information on function calls and
replaces function calls with newly created return-value variables.NodeVisitor.Result
Constructor and Description |
---|
VerilogCallCollector() |
Modifier and Type | Method and Description |
---|---|
ru.ispras.fortress.expression.Node |
transform(ru.ispras.fortress.expression.Node node) |
static java.util.Collection<ru.ispras.fortress.util.Pair<VerilogDeclaration,VerilogExpression>> |
transform(VerilogNode node) |
onAssignBegin, onAssignStatementBegin, onCaseStatementBegin, onCaseStatementItemBegin, onDeclarationBegin, onDelayedStatementBegin, onIfStatementBegin, onLoopStatementBegin, onTaskStatementBegin, onWaitStatementBegin, run
onActivityBegin, onActivityEnd, onAssignEnd, onAssignmentBegin, onAssignmentEnd, onAssignStatementEnd, onAttributeBegin, onAttributeEnd, onBlockGenerateBegin, onBlockGenerateEnd, onBlockStatementBegin, onBlockStatementEnd, onCaseGenerateBegin, onCaseGenerateEnd, onCaseGenerateItemBegin, onCaseGenerateItemEnd, onCaseStatementEnd, onCaseStatementItemEnd, onCodeBegin, onCodeEnd, onDeclarationEnd, onDefineParameterBegin, onDefineParameterEnd, onDelayedStatementEnd, onDisableStatementBegin, onDisableStatementEnd, onGenerateBegin, onGenerateEnd, onIfGenerateBegin, onIfGenerateBranchBegin, onIfGenerateBranchEnd, onIfGenerateEnd, onIfStatementBranchBegin, onIfStatementBranchEnd, onIfStatementEnd, onInstantiationBegin, onInstantiationEnd, onLoopGenerateBegin, onLoopGenerateEnd, onLoopStatementEnd, onModuleBegin, onModuleEnd, onNullStatementBegin, onNullStatementEnd, onPathDeclarationBegin, onPathDeclarationEnd, onPortBegin, onPortConnectionBegin, onPortConnectionEnd, onPortEnd, onProcedureBegin, onProcedureEnd, onPulseStyleBegin, onPulseStyleEnd, onShowCancelledBegin, onShowCancelledEnd, onSpecifyBegin, onSpecifyEnd, onTableBegin, onTableEnd, onTableEntryBegin, onTableEntryEnd, onTaskStatementEnd, onTriggerStatementBegin, onTriggerStatementEnd, onWaitStatementEnd
onBegin, onEnd
public static java.util.Collection<ru.ispras.fortress.util.Pair<VerilogDeclaration,VerilogExpression>> transform(VerilogNode node)
public ru.ispras.fortress.expression.Node transform(ru.ispras.fortress.expression.Node node)
transform
in class VerilogTransformer