LCOV - code coverage report
Current view: top level - lkbce/include/linux - mc146818rtc.h (source / functions) Hit Total Coverage
Test: coverage.info Lines: 2 2 100.0 %
Date: 2017-01-25 Functions: 0 0 -

          Line data    Source code
       1             : /* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
       2             :  * Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993
       3             :  * derived from Data Sheet, Copyright Motorola 1984 (!).
       4             :  * It was written to be part of the Linux operating system.
       5             :  */
       6             : /* permission is hereby granted to copy, modify and redistribute this code
       7             :  * in terms of the GNU Library General Public License, Version 2 or later,
       8             :  * at your option.
       9             :  */
      10             : 
      11             : #ifndef _MC146818RTC_H
      12             : #define _MC146818RTC_H
      13             : 
      14             : #include <asm/io.h>
      15             : #include <linux/rtc.h>                    /* get the user-level API */
      16             : #include <asm/mc146818rtc.h>              /* register access macros */
      17             : 
      18             : #ifdef __KERNEL__
      19             : #include <linux/spinlock.h>               /* spinlock_t */
      20           1 : extern spinlock_t rtc_lock;             /* serialize CMOS RAM access */
      21           1 : 
      22             : /* Some RTCs extend the mc146818 register set to support alarms of more
      23             :  * than 24 hours in the future; or dates that include a century code.
      24             :  * This platform_data structure can pass this information to the driver.
      25             :  *
      26             :  * Also, some platforms need suspend()/resume() hooks to kick in special
      27             :  * handling of wake alarms, e.g. activating ACPI BIOS hooks or setting up
      28             :  * a separate wakeup alarm used by some almost-clone chips.
      29             :  */
      30             : struct cmos_rtc_board_info {
      31             :         void    (*wake_on)(struct device *dev);
      32             :         void    (*wake_off)(struct device *dev);
      33             : 
      34             :         u8      rtc_day_alarm;          /* zero, or register index */
      35             :         u8      rtc_mon_alarm;          /* zero, or register index */
      36             :         u8      rtc_century;            /* zero, or register index */
      37             : };
      38             : #endif
      39             : 
      40             : /**********************************************************************
      41             :  * register summary
      42             :  **********************************************************************/
      43             : #define RTC_SECONDS             0
      44             : #define RTC_SECONDS_ALARM       1
      45             : #define RTC_MINUTES             2
      46             : #define RTC_MINUTES_ALARM       3
      47             : #define RTC_HOURS               4
      48             : #define RTC_HOURS_ALARM         5
      49             : /* RTC_*_alarm is always true if 2 MSBs are set */
      50             : # define RTC_ALARM_DONT_CARE    0xC0
      51             : 
      52             : #define RTC_DAY_OF_WEEK         6
      53             : #define RTC_DAY_OF_MONTH        7
      54             : #define RTC_MONTH               8
      55             : #define RTC_YEAR                9
      56             : 
      57             : /* control registers - Moto names
      58             :  */
      59             : #define RTC_REG_A               10
      60             : #define RTC_REG_B               11
      61             : #define RTC_REG_C               12
      62             : #define RTC_REG_D               13
      63             : 
      64             : /**********************************************************************
      65             :  * register details
      66             :  **********************************************************************/
      67             : #define RTC_FREQ_SELECT RTC_REG_A
      68             : 
      69             : /* update-in-progress  - set to "1" 244 microsecs before RTC goes off the bus,
      70             :  * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
      71             :  * totalling to a max high interval of 2.228 ms.
      72             :  */
      73             : # define RTC_UIP                0x80
      74             : # define RTC_DIV_CTL            0x70
      75             :    /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
      76             : #  define RTC_REF_CLCK_4MHZ     0x00
      77             : #  define RTC_REF_CLCK_1MHZ     0x10
      78             : #  define RTC_REF_CLCK_32KHZ    0x20
      79             :    /* 2 values for divider stage reset, others for "testing purposes only" */
      80             : #  define RTC_DIV_RESET1        0x60
      81             : #  define RTC_DIV_RESET2        0x70
      82             :   /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
      83             : # define RTC_RATE_SELECT        0x0F
      84             : 
      85             : /**********************************************************************/
      86             : #define RTC_CONTROL     RTC_REG_B
      87             : # define RTC_SET 0x80           /* disable updates for clock setting */
      88             : # define RTC_PIE 0x40           /* periodic interrupt enable */
      89             : # define RTC_AIE 0x20           /* alarm interrupt enable */
      90             : # define RTC_UIE 0x10           /* update-finished interrupt enable */
      91             : # define RTC_SQWE 0x08          /* enable square-wave output */
      92             : # define RTC_DM_BINARY 0x04     /* all time/date values are BCD if clear */
      93             : # define RTC_24H 0x02           /* 24 hour mode - else hours bit 7 means pm */
      94             : # define RTC_DST_EN 0x01        /* auto switch DST - works f. USA only */
      95             : 
      96             : /**********************************************************************/
      97             : #define RTC_INTR_FLAGS  RTC_REG_C
      98             : /* caution - cleared by read */
      99             : # define RTC_IRQF 0x80          /* any of the following 3 is active */
     100             : # define RTC_PF 0x40
     101             : # define RTC_AF 0x20
     102             : # define RTC_UF 0x10
     103             : 
     104             : /**********************************************************************/
     105             : #define RTC_VALID       RTC_REG_D
     106             : # define RTC_VRT 0x80           /* valid RAM and time */
     107             : /**********************************************************************/
     108             : 
     109             : #ifndef ARCH_RTC_LOCATION       /* Override by <asm/mc146818rtc.h>? */
     110             : 
     111             : #define RTC_IO_EXTENT   0x8
     112             : #define RTC_IO_EXTENT_USED      0x2
     113             : #define RTC_IOMAPPED    1       /* Default to I/O mapping. */
     114             : 
     115             : #else
     116             : #define RTC_IO_EXTENT_USED      RTC_IO_EXTENT
     117             : #endif /* ARCH_RTC_LOCATION */
     118             : 
     119             : #endif /* _MC146818RTC_H */

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