Line data Source code
1 : /*
2 : * linux/drivers/char/serial_core.h
3 : *
4 : * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 : *
6 : * This program is free software; you can redistribute it and/or modify
7 : * it under the terms of the GNU General Public License as published by
8 : * the Free Software Foundation; either version 2 of the License, or
9 : * (at your option) any later version.
10 : *
11 : * This program is distributed in the hope that it will be useful,
12 : * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 : * GNU General Public License for more details.
15 : *
16 : * You should have received a copy of the GNU General Public License
17 : * along with this program; if not, write to the Free Software
18 : * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 : */
20 : #ifndef LINUX_SERIAL_CORE_H
21 : #define LINUX_SERIAL_CORE_H
22 :
23 : #include <linux/serial.h>
24 :
25 : /*
26 : * The type definitions. These are from Ted Ts'o's serial.h
27 : */
28 : #define PORT_UNKNOWN 0
29 : #define PORT_8250 1
30 : #define PORT_16450 2
31 : #define PORT_16550 3
32 : #define PORT_16550A 4
33 : #define PORT_CIRRUS 5
34 : #define PORT_16650 6
35 : #define PORT_16650V2 7
36 : #define PORT_16750 8
37 : #define PORT_STARTECH 9
38 : #define PORT_16C950 10
39 : #define PORT_16654 11
40 : #define PORT_16850 12
41 : #define PORT_RSA 13
42 : #define PORT_NS16550A 14
43 : #define PORT_XSCALE 15
44 : #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
45 : #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
46 : #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
47 : #define PORT_MAX_8250 18 /* max port ID */
48 :
49 : /*
50 : * ARM specific type numbers. These are not currently guaranteed
51 : * to be implemented, and will change in the future. These are
52 : * separate so any additions to the old serial.c that occur before
53 : * we are merged can be easily merged here.
54 : */
55 : #define PORT_PXA 31
56 : #define PORT_AMBA 32
57 : #define PORT_CLPS711X 33
58 : #define PORT_SA1100 34
59 : #define PORT_UART00 35
60 : #define PORT_21285 37
61 :
62 : /* Sparc type numbers. */
63 : #define PORT_SUNZILOG 38
64 : #define PORT_SUNSAB 39
65 :
66 : /* DEC */
67 : #define PORT_DZ 46
68 : #define PORT_ZS 47
69 :
70 : /* Parisc type numbers. */
71 : #define PORT_MUX 48
72 :
73 : /* Atmel AT91 / AT32 SoC */
74 : #define PORT_ATMEL 49
75 :
76 : /* Macintosh Zilog type numbers */
77 : #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
78 : #define PORT_PMAC_ZILOG 51
79 :
80 : /* SH-SCI */
81 : #define PORT_SCI 52
82 : #define PORT_SCIF 53
83 : #define PORT_IRDA 54
84 :
85 : /* Samsung S3C2410 SoC and derivatives thereof */
86 : #define PORT_S3C2410 55
87 :
88 : /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
89 : #define PORT_IP22ZILOG 56
90 :
91 : /* Sharp LH7a40x -- an ARM9 SoC series */
92 : #define PORT_LH7A40X 57
93 :
94 : /* PPC CPM type number */
95 : #define PORT_CPM 58
96 :
97 : /* MPC52xx type numbers */
98 : #define PORT_MPC52xx 59
99 :
100 : /* IBM icom */
101 : #define PORT_ICOM 60
102 :
103 : /* Samsung S3C2440 SoC */
104 : #define PORT_S3C2440 61
105 :
106 : /* Motorola i.MX SoC */
107 : #define PORT_IMX 62
108 :
109 : /* Marvell MPSC */
110 : #define PORT_MPSC 63
111 :
112 : /* TXX9 type number */
113 : #define PORT_TXX9 64
114 :
115 : /* NEC VR4100 series SIU/DSIU */
116 : #define PORT_VR41XX_SIU 65
117 : #define PORT_VR41XX_DSIU 66
118 :
119 : /* Samsung S3C2400 SoC */
120 : #define PORT_S3C2400 67
121 :
122 : /* M32R SIO */
123 : #define PORT_M32R_SIO 68
124 :
125 : /*Digi jsm */
126 : #define PORT_JSM 69
127 :
128 : #define PORT_PNX8XXX 70
129 :
130 : /* Hilscher netx */
131 : #define PORT_NETX 71
132 :
133 : /* SUN4V Hypervisor Console */
134 : #define PORT_SUNHV 72
135 :
136 : #define PORT_S3C2412 73
137 :
138 : /* Xilinx uartlite */
139 : #define PORT_UARTLITE 74
140 :
141 : /* Blackfin bf5xx */
142 : #define PORT_BFIN 75
143 :
144 : /* Micrel KS8695 */
145 : #define PORT_KS8695 76
146 :
147 : /* Broadcom SB1250, etc. SOC */
148 : #define PORT_SB1250_DUART 77
149 :
150 : /* Freescale ColdFire */
151 : #define PORT_MCF 78
152 :
153 : /* Blackfin SPORT */
154 : #define PORT_BFIN_SPORT 79
155 :
156 : /* MN10300 on-chip UART numbers */
157 : #define PORT_MN10300 80
158 : #define PORT_MN10300_CTS 81
159 :
160 : #define PORT_SC26XX 82
161 :
162 : /* SH-SCI */
163 : #define PORT_SCIFA 83
164 :
165 : #define PORT_S3C6400 84
166 :
167 : /* NWPSERIAL */
168 : #define PORT_NWPSERIAL 85
169 :
170 : /* MAX3100 */
171 : #define PORT_MAX3100 86
172 :
173 : /* Timberdale UART */
174 : #define PORT_TIMBUART 87
175 :
176 : /* Qualcomm MSM SoCs */
177 : #define PORT_MSM 88
178 :
179 : /* BCM63xx family SoCs */
180 : #define PORT_BCM63XX 89
181 :
182 : /* Aeroflex Gaisler GRLIB APBUART */
183 : #define PORT_APBUART 90
184 :
185 : #ifdef __KERNEL__
186 :
187 : #include <linux/compiler.h>
188 : #include <linux/interrupt.h>
189 : #include <linux/circ_buf.h>
190 : #include <linux/spinlock.h>
191 : #include <linux/sched.h>
192 : #include <linux/tty.h>
193 : #include <linux/mutex.h>
194 : #include <linux/sysrq.h>
195 :
196 : struct uart_port;
197 : struct serial_struct;
198 : struct device;
199 :
200 : /*
201 : * This structure describes all the operations that can be
202 : * done on the physical hardware.
203 : */
204 : struct uart_ops {
205 : unsigned int (*tx_empty)(struct uart_port *);
206 : void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
207 : unsigned int (*get_mctrl)(struct uart_port *);
208 : void (*stop_tx)(struct uart_port *);
209 : void (*start_tx)(struct uart_port *);
210 : void (*send_xchar)(struct uart_port *, char ch);
211 : void (*stop_rx)(struct uart_port *);
212 : void (*enable_ms)(struct uart_port *);
213 : void (*break_ctl)(struct uart_port *, int ctl);
214 : int (*startup)(struct uart_port *);
215 : void (*shutdown)(struct uart_port *);
216 : void (*flush_buffer)(struct uart_port *);
217 : void (*set_termios)(struct uart_port *, struct ktermios *new,
218 : struct ktermios *old);
219 : void (*set_ldisc)(struct uart_port *);
220 : void (*pm)(struct uart_port *, unsigned int state,
221 : unsigned int oldstate);
222 : int (*set_wake)(struct uart_port *, unsigned int state);
223 :
224 : /*
225 : * Return a string describing the type of the port
226 : */
227 : const char *(*type)(struct uart_port *);
228 :
229 : /*
230 : * Release IO and memory resources used by the port.
231 : * This includes iounmap if necessary.
232 : */
233 : void (*release_port)(struct uart_port *);
234 :
235 : /*
236 : * Request IO and memory resources used by the port.
237 : * This includes iomapping the port if necessary.
238 : */
239 : int (*request_port)(struct uart_port *);
240 : void (*config_port)(struct uart_port *, int);
241 : int (*verify_port)(struct uart_port *, struct serial_struct *);
242 : int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
243 : #ifdef CONFIG_CONSOLE_POLL
244 1 : void (*poll_put_char)(struct uart_port *, unsigned char);
245 : int (*poll_get_char)(struct uart_port *);
246 : #endif
247 : };
248 :
249 : #define UART_CONFIG_TYPE (1 << 0)
250 : #define UART_CONFIG_IRQ (1 << 1)
251 :
252 : struct uart_icount {
253 : __u32 cts;
254 : __u32 dsr;
255 : __u32 rng;
256 : __u32 dcd;
257 : __u32 rx;
258 : __u32 tx;
259 : __u32 frame;
260 : __u32 overrun;
261 : __u32 parity;
262 : __u32 brk;
263 : __u32 buf_overrun;
264 : };
265 :
266 1 : typedef unsigned int __bitwise__ upf_t;
267 3 :
268 : struct uart_port {
269 : spinlock_t lock; /* port lock */
270 : unsigned long iobase; /* in/out[bwl] */
271 : unsigned char __iomem *membase; /* read/write[bwl] */
272 : unsigned int (*serial_in)(struct uart_port *, int);
273 : void (*serial_out)(struct uart_port *, int, int);
274 : unsigned int irq; /* irq number */
275 : unsigned long irqflags; /* irq flags */
276 : unsigned int uartclk; /* base uart clock */
277 : unsigned int fifosize; /* tx fifo size */
278 : unsigned char x_char; /* xon/xoff char */
279 : unsigned char regshift; /* reg offset shift */
280 : unsigned char iotype; /* io access style */
281 : unsigned char unused1;
282 :
283 : #define UPIO_PORT (0)
284 : #define UPIO_HUB6 (1)
285 : #define UPIO_MEM (2)
286 : #define UPIO_MEM32 (3)
287 : #define UPIO_AU (4) /* Au1x00 type IO */
288 : #define UPIO_TSI (5) /* Tsi108/109 type IO */
289 : #define UPIO_DWAPB (6) /* DesignWare APB UART */
290 : #define UPIO_RM9000 (7) /* RM9000 type IO */
291 :
292 : unsigned int read_status_mask; /* driver specific */
293 : unsigned int ignore_status_mask; /* driver specific */
294 : struct uart_state *state; /* pointer to parent state */
295 : struct uart_icount icount; /* statistics */
296 :
297 : struct console *cons; /* struct console, if any */
298 : #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
299 : unsigned long sysrq; /* sysrq timeout */
300 : #endif
301 :
302 : upf_t flags;
303 :
304 : #define UPF_FOURPORT ((__force upf_t) (1 << 1))
305 : #define UPF_SAK ((__force upf_t) (1 << 2))
306 : #define UPF_SPD_MASK ((__force upf_t) (0x1030))
307 : #define UPF_SPD_HI ((__force upf_t) (0x0010))
308 : #define UPF_SPD_VHI ((__force upf_t) (0x0020))
309 : #define UPF_SPD_CUST ((__force upf_t) (0x0030))
310 : #define UPF_SPD_SHI ((__force upf_t) (0x1000))
311 : #define UPF_SPD_WARP ((__force upf_t) (0x1010))
312 : #define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
313 : #define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
314 : #define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
315 : #define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
316 : #define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
317 : #define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
318 : #define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
319 : #define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
320 : #define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
321 : /* The exact UART type is known and should not be probed. */
322 : #define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
323 : #define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
324 : #define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
325 : #define UPF_DEAD ((__force upf_t) (1 << 30))
326 : #define UPF_IOREMAP ((__force upf_t) (1 << 31))
327 :
328 : #define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
329 : #define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
330 :
331 : unsigned int mctrl; /* current modem ctrl settings */
332 : unsigned int timeout; /* character-based timeout */
333 : unsigned int type; /* port type */
334 : const struct uart_ops *ops;
335 : unsigned int custom_divisor;
336 : unsigned int line; /* port index */
337 : resource_size_t mapbase; /* for ioremap */
338 : struct device *dev; /* parent device */
339 : unsigned char hub6; /* this should be in the 8250 driver */
340 : unsigned char suspended;
341 : unsigned char unused[2];
342 : void *private_data; /* generic platform data pointer */
343 : };
344 1 :
345 : /*
346 : * This is the state information which is persistent across opens.
347 : */
348 : struct uart_state {
349 : struct tty_port port;
350 :
351 : int pm_state;
352 : struct circ_buf xmit;
353 :
354 : struct tasklet_struct tlet;
355 : struct uart_port *uart_port;
356 : };
357 1 :
358 : #define UART_XMIT_SIZE PAGE_SIZE
359 :
360 :
361 : /* number of characters left in xmit buffer before we ask for more */
362 : #define WAKEUP_CHARS 256
363 :
364 : struct module;
365 : struct tty_driver;
366 :
367 : struct uart_driver {
368 : struct module *owner;
369 : const char *driver_name;
370 : const char *dev_name;
371 : int major;
372 : int minor;
373 : int nr;
374 : struct console *cons;
375 :
376 : /*
377 : * these are private; the low level driver should not
378 : * touch these; they should be initialised to NULL
379 : */
380 : struct uart_state *state;
381 : struct tty_driver *tty_driver;
382 : };
383 :
384 : void uart_write_wakeup(struct uart_port *port);
385 :
386 : /*
387 : * Baud rate helpers.
388 : */
389 : void uart_update_timeout(struct uart_port *port, unsigned int cflag,
390 : unsigned int baud);
391 : unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
392 : struct ktermios *old, unsigned int min,
393 : unsigned int max);
394 : unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
395 :
396 : /*
397 : * Console helpers.
398 : */
399 : struct uart_port *uart_get_console(struct uart_port *ports, int nr,
400 : struct console *c);
401 : void uart_parse_options(char *options, int *baud, int *parity, int *bits,
402 : int *flow);
403 : int uart_set_options(struct uart_port *port, struct console *co, int baud,
404 : int parity, int bits, int flow);
405 : struct tty_driver *uart_console_device(struct console *co, int *index);
406 : void uart_console_write(struct uart_port *port, const char *s,
407 : unsigned int count,
408 : void (*putchar)(struct uart_port *, int));
409 :
410 : /*
411 : * Port/driver registration/removal
412 : */
413 : int uart_register_driver(struct uart_driver *uart);
414 : void uart_unregister_driver(struct uart_driver *uart);
415 : int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
416 : int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
417 : int uart_match_port(struct uart_port *port1, struct uart_port *port2);
418 :
419 : /*
420 : * Power Management
421 : */
422 : int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
423 : int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
424 :
425 : #define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
426 : #define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
427 :
428 : #define uart_circ_chars_pending(circ) \
429 : (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
430 :
431 : #define uart_circ_chars_free(circ) \
432 : (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
433 :
434 : static inline int uart_tx_stopped(struct uart_port *port)
435 : {
436 48 : struct tty_struct *tty = port->state->port.tty;
437 48 : if(tty->stopped || tty->hw_stopped)
438 24 : return 1;
439 24 : return 0;
440 : }
441 :
442 : /*
443 : * The following are helper functions for the low level drivers.
444 : */
445 : static inline int
446 : uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
447 : {
448 : #ifdef SUPPORT_SYSRQ
449 : if (port->sysrq) {
450 : if (ch && time_before(jiffies, port->sysrq)) {
451 : handle_sysrq(ch, port->state->port.tty);
452 : port->sysrq = 0;
453 : return 1;
454 : }
455 : port->sysrq = 0;
456 : }
457 : #endif
458 24 : return 0;
459 : }
460 : #ifndef SUPPORT_SYSRQ
461 : #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
462 : #endif
463 :
464 : /*
465 : * We do the SysRQ and SAK checking like this...
466 : */
467 : static inline int uart_handle_break(struct uart_port *port)
468 : {
469 24 : struct uart_state *state = port->state;
470 : #ifdef SUPPORT_SYSRQ
471 : if (port->cons && port->cons->index == port->line) {
472 : if (!port->sysrq) {
473 : port->sysrq = jiffies + HZ*5;
474 : return 1;
475 : }
476 : port->sysrq = 0;
477 : }
478 : #endif
479 24 : if (port->flags & UPF_SAK)
480 12 : do_SAK(state->port.tty);
481 12 : return 0;
482 : }
483 :
484 : /**
485 : * uart_handle_dcd_change - handle a change of carrier detect state
486 : * @uport: uart_port structure for the open port
487 : * @status: new carrier detect status, nonzero if active
488 : */
489 : static inline void
490 : uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
491 : {
492 52 : struct uart_state *state = uport->state;
493 52 : struct tty_port *port = &state->port;
494 :
495 26 : uport->icount.dcd++;
496 :
497 : #ifdef CONFIG_HARD_PPS
498 : if ((uport->flags & UPF_HARDPPS_CD) && status)
499 : hardpps();
500 : #endif
501 :
502 52 : if (port->flags & ASYNC_CHECK_CD) {
503 52 : if (status)
504 26 : wake_up_interruptible(&port->open_wait);
505 78 : else if (port->tty)
506 26 : tty_hangup(port->tty);
507 26 : }
508 : }
509 :
510 : /**
511 : * uart_handle_cts_change - handle a change of clear-to-send state
512 : * @uport: uart_port structure for the open port
513 : * @status: new clear to send status, nonzero if active
514 : */
515 : static inline void
516 : uart_handle_cts_change(struct uart_port *uport, unsigned int status)
517 : {
518 104 : struct tty_port *port = &uport->state->port;
519 104 : struct tty_struct *tty = port->tty;
520 :
521 52 : uport->icount.cts++;
522 :
523 104 : if (port->flags & ASYNC_CTS_FLOW) {
524 104 : if (tty->hw_stopped) {
525 104 : if (status) {
526 52 : tty->hw_stopped = 0;
527 364 : uport->ops->start_tx(uport);
528 52 : uart_write_wakeup(uport);
529 : }
530 : } else {
531 104 : if (!status) {
532 52 : tty->hw_stopped = 1;
533 364 : uport->ops->stop_tx(uport);
534 : }
535 52 : }
536 : }
537 : }
538 :
539 : #include <linux/tty_flip.h>
540 :
541 : static inline void
542 : uart_insert_char(struct uart_port *port, unsigned int status,
543 : unsigned int overrun, unsigned int ch, unsigned int flag)
544 : {
545 24 : struct tty_struct *tty = port->state->port.tty;
546 :
547 24 : if ((status & port->ignore_status_mask & ~overrun) == 0)
548 24 : tty_insert_flip_char(tty, ch, flag);
549 :
550 : /*
551 : * Overrun is special. Since it's reported immediately,
552 : * it doesn't affect the current character.
553 : */
554 48 : if (status & ~port->ignore_status_mask & overrun)
555 48 : tty_insert_flip_char(tty, 0, TTY_OVERRUN);
556 36 : }
557 :
558 : /*
559 : * UART_ENABLE_MS - determine if port should enable modem status irqs
560 : */
561 : #define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
562 : (cflag) & CRTSCTS || \
563 : !((cflag) & CLOCAL))
564 :
565 : #endif
566 :
567 : #endif /* LINUX_SERIAL_CORE_H */
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