Line data Source code
1 : #ifndef _ASM_X86_MPSPEC_H
2 : #define _ASM_X86_MPSPEC_H
3 :
4 : #include <linux/init.h>
5 :
6 : #include <asm/mpspec_def.h>
7 : #include <asm/x86_init.h>
8 :
9 : extern int apic_version[MAX_APICS];
10 : extern int pic_mode;
11 :
12 : #ifdef CONFIG_X86_32
13 :
14 : /*
15 : * Summit or generic (i.e. installer) kernels need lots of bus entries.
16 : * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
17 : */
18 : #if CONFIG_BASE_SMALL == 0
19 : # define MAX_MP_BUSSES 260
20 : #else
21 : # define MAX_MP_BUSSES 32
22 : #endif
23 :
24 : #define MAX_IRQ_SOURCES 256
25 :
26 : extern unsigned int def_to_bigsmp;
27 : extern u8 apicid_2_node[];
28 :
29 : #ifdef CONFIG_X86_NUMAQ
30 : extern int mp_bus_id_to_node[MAX_MP_BUSSES];
31 : extern int mp_bus_id_to_local[MAX_MP_BUSSES];
32 : extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
33 : #endif
34 :
35 : #define MAX_APICID 256
36 :
37 : #else /* CONFIG_X86_64: */
38 :
39 : #define MAX_MP_BUSSES 256
40 : /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
41 : #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
42 :
43 : #endif /* CONFIG_X86_64 */
44 :
45 : #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
46 : extern int mp_bus_id_to_type[MAX_MP_BUSSES];
47 : #endif
48 :
49 : extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
50 :
51 : extern unsigned int boot_cpu_physical_apicid;
52 : extern unsigned int max_physical_apicid;
53 : extern int mpc_default_type;
54 : extern unsigned long mp_lapic_addr;
55 :
56 : #ifdef CONFIG_X86_LOCAL_APIC
57 : extern int smp_found_config;
58 : #else
59 : # define smp_found_config 0
60 : #endif
61 :
62 : static inline void get_smp_config(void)
63 : {
64 : x86_init.mpparse.get_smp_config(0);
65 : }
66 :
67 : static inline void early_get_smp_config(void)
68 : {
69 : x86_init.mpparse.get_smp_config(1);
70 : }
71 :
72 : static inline void find_smp_config(void)
73 : {
74 : x86_init.mpparse.find_smp_config();
75 : }
76 :
77 : #ifdef CONFIG_X86_MPPARSE
78 : extern void early_reserve_e820_mpc_new(void);
79 : extern int enable_update_mptable;
80 : extern int default_mpc_apic_id(struct mpc_cpu *m);
81 : extern void default_smp_read_mpc_oem(struct mpc_table *mpc);
82 : # ifdef CONFIG_X86_IO_APIC
83 : extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
84 : # else
85 : # define default_mpc_oem_bus_info NULL
86 : # endif
87 : extern void default_find_smp_config(void);
88 : extern void default_get_smp_config(unsigned int early);
89 : #else
90 : static inline void early_reserve_e820_mpc_new(void) { }
91 : #define enable_update_mptable 0
92 : #define default_mpc_apic_id NULL
93 : #define default_smp_read_mpc_oem NULL
94 : #define default_mpc_oem_bus_info NULL
95 : #define default_find_smp_config x86_init_noop
96 : #define default_get_smp_config x86_init_uint_noop
97 : #endif
98 :
99 : void __cpuinit generic_processor_info(int apicid, int version);
100 : #ifdef CONFIG_ACPI
101 : extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
102 : extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
103 : u32 gsi);
104 : extern void mp_config_acpi_legacy_irqs(void);
105 : struct device;
106 : extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
107 : int active_high_low);
108 : extern int acpi_probe_gsi(void);
109 : #ifdef CONFIG_X86_IO_APIC
110 : extern int mp_find_ioapic(int gsi);
111 : extern int mp_find_ioapic_pin(int ioapic, int gsi);
112 : #endif
113 : #else /* !CONFIG_ACPI: */
114 : static inline int acpi_probe_gsi(void)
115 : {
116 : return 0;
117 : }
118 : #endif /* CONFIG_ACPI */
119 :
120 : #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
121 :
122 : struct physid_mask {
123 : unsigned long mask[PHYSID_ARRAY_SIZE];
124 : };
125 :
126 : typedef struct physid_mask physid_mask_t;
127 :
128 : #define physid_set(physid, map) set_bit(physid, (map).mask)
129 : #define physid_clear(physid, map) clear_bit(physid, (map).mask)
130 : #define physid_isset(physid, map) test_bit(physid, (map).mask)
131 : #define physid_test_and_set(physid, map) \
132 : test_and_set_bit(physid, (map).mask)
133 :
134 : #define physids_and(dst, src1, src2) \
135 : bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
136 :
137 : #define physids_or(dst, src1, src2) \
138 : bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
139 :
140 : #define physids_clear(map) \
141 : bitmap_zero((map).mask, MAX_APICS)
142 :
143 : #define physids_complement(dst, src) \
144 : bitmap_complement((dst).mask, (src).mask, MAX_APICS)
145 :
146 : #define physids_empty(map) \
147 : bitmap_empty((map).mask, MAX_APICS)
148 :
149 : #define physids_equal(map1, map2) \
150 : bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
151 :
152 : #define physids_weight(map) \
153 : bitmap_weight((map).mask, MAX_APICS)
154 :
155 : #define physids_shift_right(d, s, n) \
156 : bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
157 :
158 : #define physids_shift_left(d, s, n) \
159 : bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
160 :
161 : static inline unsigned long physids_coerce(physid_mask_t *map)
162 : {
163 : return map->mask[0];
164 : }
165 :
166 : static inline void physids_promote(unsigned long physids, physid_mask_t *map)
167 : {
168 : physids_clear(*map);
169 : map->mask[0] = physids;
170 : }
171 :
172 : /* Note: will create very large stack frames if physid_mask_t is big */
173 : #define physid_mask_of_physid(physid) \
174 : ({ \
175 : physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
176 : physid_set(physid, __physid_mask); \
177 : __physid_mask; \
178 : })
179 :
180 : static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
181 : {
182 : physids_clear(*map);
183 : physid_set(physid, *map);
184 : }
185 :
186 : #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
187 : #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
188 :
189 : extern physid_mask_t phys_cpu_present_map;
190 :
191 : extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
192 :
193 : extern int default_acpi_madt_oem_check(char *, char *);
194 1 :
195 : #endif /* _ASM_X86_MPSPEC_H */
|