Line data Source code
1 : /*
2 : * pci.h
3 : *
4 : * PCI defines and function prototypes
5 : * Copyright 1994, Drew Eckhardt
6 : * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 : *
8 : * For more information, please consult the following manuals (look at
9 : * http://www.pcisig.com/ for how to get them):
10 : *
11 : * PCI BIOS Specification
12 : * PCI Local Bus Specification
13 : * PCI to PCI Bridge Specification
14 : * PCI System Design Guide
15 : */
16 :
17 : #ifndef LINUX_PCI_H
18 : #define LINUX_PCI_H
19 :
20 : #include <linux/pci_regs.h> /* The pci register defines */
21 :
22 : /*
23 : * The PCI interface treats multi-function devices as independent
24 : * devices. The slot/function address of each device is encoded
25 : * in a single byte as follows:
26 : *
27 : * 7:3 = slot
28 : * 2:0 = function
29 : */
30 : #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 : #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 : #define PCI_FUNC(devfn) ((devfn) & 0x07)
33 :
34 : /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 : #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 : #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 : #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 : #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 : #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
40 :
41 : #ifdef __KERNEL__
42 :
43 : #include <linux/mod_devicetable.h>
44 :
45 : #include <linux/types.h>
46 : #include <linux/init.h>
47 : #include <linux/ioport.h>
48 : #include <linux/list.h>
49 : #include <linux/compiler.h>
50 : #include <linux/errno.h>
51 : #include <linux/kobject.h>
52 : #include <asm/atomic.h>
53 : #include <linux/device.h>
54 : #include <linux/io.h>
55 : #include <linux/irqreturn.h>
56 :
57 : /* Include the ID list */
58 : #include <linux/pci_ids.h>
59 :
60 : /* pci_slot represents a physical slot */
61 : struct pci_slot {
62 : struct pci_bus *bus; /* The bus this slot is on */
63 : struct list_head list; /* node in list of slots on this bus */
64 : struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 : unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
66 : struct kobject kobj;
67 : };
68 :
69 : static inline const char *pci_slot_name(const struct pci_slot *slot)
70 : {
71 : return kobject_name(&slot->kobj);
72 : }
73 :
74 : /* File state for mmap()s on /proc/bus/pci/X/Y */
75 : enum pci_mmap_state {
76 : pci_mmap_io,
77 : pci_mmap_mem
78 : };
79 :
80 : /* This defines the direction arg to the DMA mapping routines. */
81 : #define PCI_DMA_BIDIRECTIONAL 0
82 : #define PCI_DMA_TODEVICE 1
83 : #define PCI_DMA_FROMDEVICE 2
84 : #define PCI_DMA_NONE 3
85 :
86 : /*
87 : * For PCI devices, the region numbers are assigned this way:
88 : */
89 : enum {
90 : /* #0-5: standard PCI resources */
91 : PCI_STD_RESOURCES,
92 : PCI_STD_RESOURCE_END = 5,
93 :
94 : /* #6: expansion ROM resource */
95 : PCI_ROM_RESOURCE,
96 :
97 : /* device specific resources */
98 : #ifdef CONFIG_PCI_IOV
99 : PCI_IOV_RESOURCES,
100 : PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
101 : #endif
102 :
103 : /* resources assigned to buses behind the bridge */
104 : #define PCI_BRIDGE_RESOURCE_NUM 4
105 :
106 : PCI_BRIDGE_RESOURCES,
107 : PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 : PCI_BRIDGE_RESOURCE_NUM - 1,
109 :
110 : /* total resources associated with a PCI device */
111 : PCI_NUM_RESOURCES,
112 :
113 : /* preserve this for compatibility */
114 : DEVICE_COUNT_RESOURCE
115 : };
116 :
117 1 : typedef int __bitwise pci_power_t;
118 :
119 : #define PCI_D0 ((pci_power_t __force) 0)
120 : #define PCI_D1 ((pci_power_t __force) 1)
121 : #define PCI_D2 ((pci_power_t __force) 2)
122 : #define PCI_D3hot ((pci_power_t __force) 3)
123 : #define PCI_D3cold ((pci_power_t __force) 4)
124 : #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 : #define PCI_POWER_ERROR ((pci_power_t __force) -1)
126 :
127 : /* Remember to update this when the list above changes! */
128 : extern const char *pci_power_names[];
129 :
130 : static inline const char *pci_power_name(pci_power_t state)
131 : {
132 : return pci_power_names[1 + (int) state];
133 : }
134 :
135 : #define PCI_PM_D2_DELAY 200
136 : #define PCI_PM_D3_WAIT 10
137 : #define PCI_PM_BUS_WAIT 50
138 :
139 : /** The pci_channel state describes connectivity between the CPU and
140 : * the pci device. If some PCI bus between here and the pci device
141 : * has crashed or locked up, this info is reflected here.
142 : */
143 1 : typedef unsigned int __bitwise pci_channel_state_t;
144 1 :
145 : enum pci_channel_state {
146 : /* I/O channel is in normal state */
147 : pci_channel_io_normal = (__force pci_channel_state_t) 1,
148 :
149 : /* I/O to channel is blocked */
150 : pci_channel_io_frozen = (__force pci_channel_state_t) 2,
151 :
152 : /* PCI card is dead */
153 : pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
154 : };
155 :
156 : typedef unsigned int __bitwise pcie_reset_state_t;
157 :
158 : enum pcie_reset_state {
159 : /* Reset is NOT asserted (Use to deassert reset) */
160 : pcie_deassert_reset = (__force pcie_reset_state_t) 1,
161 :
162 : /* Use #PERST to reset PCI-E device */
163 : pcie_warm_reset = (__force pcie_reset_state_t) 2,
164 :
165 : /* Use PCI-E Hot Reset to reset device */
166 : pcie_hot_reset = (__force pcie_reset_state_t) 3
167 : };
168 :
169 1 : typedef unsigned short __bitwise pci_dev_flags_t;
170 : enum pci_dev_flags {
171 : /* INTX_DISABLE in PCI_COMMAND register disables MSI
172 : * generation too.
173 : */
174 : PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175 : /* Device configuration is irrevocably lost if disabled into D3 */
176 : PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
177 : };
178 :
179 : enum pci_irq_reroute_variant {
180 : INTEL_IRQ_REROUTE_VARIANT = 1,
181 : MAX_IRQ_REROUTE_VARIANTS = 3
182 : };
183 :
184 1 : typedef unsigned short __bitwise pci_bus_flags_t;
185 : enum pci_bus_flags {
186 : PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
187 : PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
188 : };
189 :
190 : struct pci_cap_saved_state {
191 : struct hlist_node next;
192 : char cap_nr;
193 : u32 data[0];
194 : };
195 :
196 1 : struct pcie_link_state;
197 : struct pci_vpd;
198 : struct pci_sriov;
199 3 : struct pci_ats;
200 :
201 : /*
202 : * The pci_dev structure is used to describe PCI devices.
203 : */
204 : struct pci_dev {
205 : struct list_head bus_list; /* node in per-bus list */
206 : struct pci_bus *bus; /* bus this device is on */
207 : struct pci_bus *subordinate; /* bus this device bridges to */
208 :
209 : void *sysdata; /* hook for sys-specific extension */
210 : struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
211 : struct pci_slot *slot; /* Physical slot this device is in */
212 :
213 : unsigned int devfn; /* encoded device & function index */
214 : unsigned short vendor;
215 : unsigned short device;
216 : unsigned short subsystem_vendor;
217 : unsigned short subsystem_device;
218 : unsigned int class; /* 3 bytes: (base,sub,prog-if) */
219 : u8 revision; /* PCI revision, low byte of class word */
220 : u8 hdr_type; /* PCI header type (`multi' flag masked out) */
221 : u8 pcie_cap; /* PCI-E capability offset */
222 : u8 pcie_type; /* PCI-E device/port type */
223 : u8 rom_base_reg; /* which config register controls the ROM */
224 : u8 pin; /* which interrupt pin this device uses */
225 :
226 : struct pci_driver *driver; /* which driver has allocated this device */
227 : u64 dma_mask; /* Mask of the bits of bus address this
228 : device implements. Normally this is
229 : 0xffffffff. You only need to change
230 : this if your device has broken DMA
231 : or supports 64-bit transfers. */
232 :
233 : struct device_dma_parameters dma_parms;
234 :
235 : pci_power_t current_state; /* Current operating state. In ACPI-speak,
236 : this is D0-D3, D0 being fully functional,
237 : and D3 being off. */
238 : int pm_cap; /* PM capability offset in the
239 : configuration space */
240 : unsigned int pme_support:5; /* Bitmask of states from which PME#
241 : can be generated */
242 : unsigned int d1_support:1; /* Low power state D1 is supported */
243 : unsigned int d2_support:1; /* Low power state D2 is supported */
244 : unsigned int no_d1d2:1; /* Only allow D0 and D3 */
245 : unsigned int wakeup_prepared:1;
246 : unsigned int d3_delay; /* D3->D0 transition time in ms */
247 :
248 : #ifdef CONFIG_PCIEASPM
249 : struct pcie_link_state *link_state; /* ASPM link state. */
250 : #endif
251 :
252 : pci_channel_state_t error_state; /* current connectivity state */
253 : struct device dev; /* Generic device interface */
254 :
255 : int cfg_size; /* Size of configuration space */
256 :
257 : /*
258 : * Instead of touching interrupt line and base address registers
259 : * directly, use the values stored here. They might be different!
260 : */
261 : unsigned int irq;
262 : struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
263 :
264 : /* These fields are used by common fixups */
265 : unsigned int transparent:1; /* Transparent PCI bridge */
266 : unsigned int multifunction:1;/* Part of multi-function device */
267 : /* keep track of device state */
268 : unsigned int is_added:1;
269 : unsigned int is_busmaster:1; /* device is busmaster */
270 : unsigned int no_msi:1; /* device may not use msi */
271 : unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
272 : unsigned int broken_parity_status:1; /* Device generates false positive parity */
273 : unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
274 : unsigned int msi_enabled:1;
275 : unsigned int msix_enabled:1;
276 : unsigned int ari_enabled:1; /* ARI forwarding */
277 : unsigned int is_managed:1;
278 : unsigned int is_pcie:1;
279 : unsigned int needs_freset:1; /* Dev requires fundamental reset */
280 : unsigned int state_saved:1;
281 : unsigned int is_physfn:1;
282 : unsigned int is_virtfn:1;
283 : unsigned int reset_fn:1;
284 : unsigned int is_hotplug_bridge:1;
285 : unsigned int aer_firmware_first:1;
286 : pci_dev_flags_t dev_flags;
287 : atomic_t enable_cnt; /* pci_enable_device has been called */
288 :
289 : u32 saved_config_space[16]; /* config space saved at suspend time */
290 : struct hlist_head saved_cap_space;
291 : struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
292 : int rom_attr_enabled; /* has display of the rom attribute been enabled? */
293 : struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
294 : struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
295 : #ifdef CONFIG_PCI_MSI
296 : struct list_head msi_list;
297 : #endif
298 : struct pci_vpd *vpd;
299 : #ifdef CONFIG_PCI_IOV
300 : union {
301 : struct pci_sriov *sriov; /* SR-IOV capability related */
302 : struct pci_dev *physfn; /* the PF this VF is associated with */
303 : };
304 : struct pci_ats *ats; /* Address Translation Service */
305 : #endif
306 : };
307 :
308 : extern struct pci_dev *alloc_pci_dev(void);
309 :
310 : #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
311 : #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
312 : #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
313 :
314 : static inline int pci_channel_offline(struct pci_dev *pdev)
315 : {
316 : return (pdev->error_state != pci_channel_io_normal);
317 : }
318 :
319 : static inline struct pci_cap_saved_state *pci_find_saved_cap(
320 : struct pci_dev *pci_dev, char cap)
321 : {
322 : struct pci_cap_saved_state *tmp;
323 : struct hlist_node *pos;
324 :
325 : hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
326 : if (tmp->cap_nr == cap)
327 : return tmp;
328 : }
329 : return NULL;
330 : }
331 :
332 : static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
333 : struct pci_cap_saved_state *new_cap)
334 : {
335 : hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
336 : }
337 2 :
338 : #ifndef PCI_BUS_NUM_RESOURCES
339 : #define PCI_BUS_NUM_RESOURCES 16
340 : #endif
341 :
342 : #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
343 :
344 : struct pci_bus {
345 : struct list_head node; /* node in list of buses */
346 : struct pci_bus *parent; /* parent bus this bridge is on */
347 : struct list_head children; /* list of child buses */
348 : struct list_head devices; /* list of devices on this bus */
349 : struct pci_dev *self; /* bridge device as seen by parent */
350 : struct list_head slots; /* list of slots on this bus */
351 : struct resource *resource[PCI_BUS_NUM_RESOURCES];
352 : /* address space routed to this bus */
353 :
354 : struct pci_ops *ops; /* configuration access functions */
355 : void *sysdata; /* hook for sys-specific extension */
356 : struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
357 :
358 : unsigned char number; /* bus number */
359 : unsigned char primary; /* number of primary bridge */
360 : unsigned char secondary; /* number of secondary bridge */
361 : unsigned char subordinate; /* max number of subordinate buses */
362 :
363 : char name[48];
364 :
365 : unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
366 : pci_bus_flags_t bus_flags; /* Inherited by child busses */
367 : struct device *bridge;
368 : struct device dev;
369 : struct bin_attribute *legacy_io; /* legacy I/O for this bus */
370 : struct bin_attribute *legacy_mem; /* legacy mem */
371 : unsigned int is_added:1;
372 : };
373 :
374 : #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
375 : #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
376 :
377 : /*
378 : * Returns true if the pci bus is root (behind host-pci bridge),
379 : * false otherwise
380 : */
381 : static inline bool pci_is_root_bus(struct pci_bus *pbus)
382 : {
383 : return !(pbus->parent);
384 : }
385 :
386 : #ifdef CONFIG_PCI_MSI
387 : static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
388 : {
389 : return pci_dev->msi_enabled || pci_dev->msix_enabled;
390 : }
391 : #else
392 : static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
393 : #endif
394 1 :
395 : /*
396 : * Error values that may be returned by PCI functions.
397 : */
398 : #define PCIBIOS_SUCCESSFUL 0x00
399 : #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
400 : #define PCIBIOS_BAD_VENDOR_ID 0x83
401 : #define PCIBIOS_DEVICE_NOT_FOUND 0x86
402 : #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
403 : #define PCIBIOS_SET_FAILED 0x88
404 : #define PCIBIOS_BUFFER_TOO_SMALL 0x89
405 :
406 : /* Low-level architecture-dependent routines */
407 :
408 : struct pci_ops {
409 : int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
410 : int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
411 : };
412 :
413 : /*
414 : * ACPI needs to be able to access PCI config space before we've done a
415 : * PCI bus scan and created pci_bus structures.
416 : */
417 : extern int raw_pci_read(unsigned int domain, unsigned int bus,
418 : unsigned int devfn, int reg, int len, u32 *val);
419 : extern int raw_pci_write(unsigned int domain, unsigned int bus,
420 : unsigned int devfn, int reg, int len, u32 val);
421 :
422 : struct pci_bus_region {
423 : resource_size_t start;
424 : resource_size_t end;
425 : };
426 1 :
427 : struct pci_dynids {
428 : spinlock_t lock; /* protects list, index */
429 : struct list_head list; /* for IDs added at runtime */
430 : };
431 :
432 : /* ---------------------------------------------------------------- */
433 : /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
434 : * a set of callbacks in struct pci_error_handlers, then that device driver
435 : * will be notified of PCI bus errors, and will be driven to recovery
436 : * when an error occurs.
437 : */
438 :
439 1 : typedef unsigned int __bitwise pci_ers_result_t;
440 :
441 : enum pci_ers_result {
442 : /* no result/none/not supported in device driver */
443 : PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
444 :
445 : /* Device driver can recover without slot reset */
446 : PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
447 :
448 1 : /* Device driver wants slot to be reset. */
449 : PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
450 :
451 : /* Device has completely failed, is unrecoverable */
452 : PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
453 :
454 : /* Device driver is fully recovered and operational */
455 : PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
456 : };
457 :
458 : /* PCI bus error event callbacks */
459 : struct pci_error_handlers {
460 : /* PCI bus error detected on this device */
461 : pci_ers_result_t (*error_detected)(struct pci_dev *dev,
462 : enum pci_channel_state error);
463 :
464 : /* MMIO has been re-enabled, but not DMA */
465 : pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
466 :
467 : /* PCI Express link has been reset */
468 : pci_ers_result_t (*link_reset)(struct pci_dev *dev);
469 :
470 : /* PCI slot has been reset */
471 : pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
472 :
473 : /* Device driver may resume normal operations */
474 : void (*resume)(struct pci_dev *dev);
475 : };
476 1 :
477 : /* ---------------------------------------------------------------- */
478 :
479 : struct module;
480 : struct pci_driver {
481 : struct list_head node;
482 : char *name;
483 : const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
484 : int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
485 : void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
486 : int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
487 : int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
488 : int (*resume_early) (struct pci_dev *dev);
489 : int (*resume) (struct pci_dev *dev); /* Device woken up */
490 : void (*shutdown) (struct pci_dev *dev);
491 : struct pci_error_handlers *err_handler;
492 : struct device_driver driver;
493 : struct pci_dynids dynids;
494 : };
495 :
496 : #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
497 :
498 : /**
499 : * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
500 : * @_table: device table name
501 : *
502 : * This macro is used to create a struct pci_device_id array (a device table)
503 : * in a generic manner.
504 : */
505 : #define DEFINE_PCI_DEVICE_TABLE(_table) \
506 : const struct pci_device_id _table[] __devinitconst
507 :
508 : /**
509 : * PCI_DEVICE - macro used to describe a specific pci device
510 : * @vend: the 16 bit PCI Vendor ID
511 : * @dev: the 16 bit PCI Device ID
512 : *
513 : * This macro is used to create a struct pci_device_id that matches a
514 : * specific device. The subvendor and subdevice fields will be set to
515 : * PCI_ANY_ID.
516 : */
517 : #define PCI_DEVICE(vend,dev) \
518 : .vendor = (vend), .device = (dev), \
519 : .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
520 :
521 : /**
522 : * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
523 : * @dev_class: the class, subclass, prog-if triple for this device
524 : * @dev_class_mask: the class mask for this device
525 : *
526 : * This macro is used to create a struct pci_device_id that matches a
527 : * specific PCI class. The vendor, device, subvendor, and subdevice
528 : * fields will be set to PCI_ANY_ID.
529 : */
530 : #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
531 : .class = (dev_class), .class_mask = (dev_class_mask), \
532 : .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
533 : .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
534 :
535 : /**
536 : * PCI_VDEVICE - macro used to describe a specific pci device in short form
537 : * @vendor: the vendor name
538 : * @device: the 16 bit PCI Device ID
539 : *
540 : * This macro is used to create a struct pci_device_id that matches a
541 : * specific PCI device. The subvendor, and subdevice fields will be set
542 : * to PCI_ANY_ID. The macro allows the next field to follow as the device
543 : * private data.
544 : */
545 :
546 : #define PCI_VDEVICE(vendor, device) \
547 : PCI_VENDOR_ID_##vendor, (device), \
548 : PCI_ANY_ID, PCI_ANY_ID, 0, 0
549 :
550 : /* these external functions are only available when PCI support is enabled */
551 : #ifdef CONFIG_PCI
552 :
553 : extern struct bus_type pci_bus_type;
554 :
555 : /* Do NOT directly access these two variables, unless you are arch specific pci
556 : * code, or pci core code. */
557 : extern struct list_head pci_root_buses; /* list of all known PCI buses */
558 : /* Some device drivers need know if pci is initiated */
559 : extern int no_pci_devices(void);
560 :
561 : void pcibios_fixup_bus(struct pci_bus *);
562 : int __must_check pcibios_enable_device(struct pci_dev *, int mask);
563 : char *pcibios_setup(char *str);
564 :
565 : /* Used only when drivers/pci/setup.c is used */
566 : void pcibios_align_resource(void *, struct resource *, resource_size_t,
567 : resource_size_t);
568 : void pcibios_update_irq(struct pci_dev *, int irq);
569 :
570 : /* Weak but can be overriden by arch */
571 : void pci_fixup_cardbus(struct pci_bus *);
572 :
573 : /* Generic PCI functions used internally */
574 :
575 : extern struct pci_bus *pci_find_bus(int domain, int busnr);
576 : void pci_bus_add_devices(const struct pci_bus *bus);
577 : struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
578 : struct pci_ops *ops, void *sysdata);
579 : static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
580 : void *sysdata)
581 : {
582 : struct pci_bus *root_bus;
583 : root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
584 : if (root_bus)
585 : pci_bus_add_devices(root_bus);
586 : return root_bus;
587 : }
588 : struct pci_bus *pci_create_bus(struct device *parent, int bus,
589 : struct pci_ops *ops, void *sysdata);
590 : struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
591 : int busnr);
592 : struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
593 : const char *name,
594 : struct hotplug_slot *hotplug);
595 : void pci_destroy_slot(struct pci_slot *slot);
596 : void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
597 : int pci_scan_slot(struct pci_bus *bus, int devfn);
598 : struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
599 : void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
600 : unsigned int pci_scan_child_bus(struct pci_bus *bus);
601 : int __must_check pci_bus_add_device(struct pci_dev *dev);
602 : void pci_read_bridge_bases(struct pci_bus *child);
603 : struct resource *pci_find_parent_resource(const struct pci_dev *dev,
604 : struct resource *res);
605 : u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
606 : int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
607 : u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
608 : extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
609 : extern void pci_dev_put(struct pci_dev *dev);
610 : extern void pci_remove_bus(struct pci_bus *b);
611 : extern void pci_remove_bus_device(struct pci_dev *dev);
612 : extern void pci_stop_bus_device(struct pci_dev *dev);
613 : void pci_setup_cardbus(struct pci_bus *bus);
614 : extern void pci_sort_breadthfirst(void);
615 :
616 : /* Generic PCI functions exported to card drivers */
617 :
618 : #ifdef CONFIG_PCI_LEGACY
619 : struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
620 : unsigned int device,
621 : struct pci_dev *from);
622 : #endif /* CONFIG_PCI_LEGACY */
623 :
624 : enum pci_lost_interrupt_reason {
625 : PCI_LOST_IRQ_NO_INFORMATION = 0,
626 : PCI_LOST_IRQ_DISABLE_MSI,
627 : PCI_LOST_IRQ_DISABLE_MSIX,
628 : PCI_LOST_IRQ_DISABLE_ACPI,
629 : };
630 : enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
631 : int pci_find_capability(struct pci_dev *dev, int cap);
632 : int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
633 : int pci_find_ext_capability(struct pci_dev *dev, int cap);
634 : int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
635 : int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
636 : struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
637 :
638 : struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
639 : struct pci_dev *from);
640 : struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
641 : unsigned int ss_vendor, unsigned int ss_device,
642 : struct pci_dev *from);
643 : struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
644 : struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
645 : unsigned int devfn);
646 : static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
647 : unsigned int devfn)
648 : {
649 : return pci_get_domain_bus_and_slot(0, bus, devfn);
650 : }
651 : struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
652 : int pci_dev_present(const struct pci_device_id *ids);
653 :
654 : int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
655 : int where, u8 *val);
656 : int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
657 : int where, u16 *val);
658 : int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
659 : int where, u32 *val);
660 : int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
661 : int where, u8 val);
662 : int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
663 : int where, u16 val);
664 : int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
665 : int where, u32 val);
666 : struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
667 :
668 : static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
669 : {
670 9 : return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
671 : }
672 : static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
673 : {
674 3 : return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
675 : }
676 : static inline int pci_read_config_dword(struct pci_dev *dev, int where,
677 : u32 *val)
678 6 : {
679 12 : return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
680 : }
681 : static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
682 : {
683 6 : return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
684 : }
685 : static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
686 : {
687 : return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
688 : }
689 : static inline int pci_write_config_dword(struct pci_dev *dev, int where,
690 : u32 val)
691 : {
692 : return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
693 : }
694 :
695 : int __must_check pci_enable_device(struct pci_dev *dev);
696 : int __must_check pci_enable_device_io(struct pci_dev *dev);
697 : int __must_check pci_enable_device_mem(struct pci_dev *dev);
698 : int __must_check pci_reenable_device(struct pci_dev *);
699 : int __must_check pcim_enable_device(struct pci_dev *pdev);
700 : void pcim_pin_device(struct pci_dev *pdev);
701 :
702 : static inline int pci_is_enabled(struct pci_dev *pdev)
703 : {
704 : return (atomic_read(&pdev->enable_cnt) > 0);
705 : }
706 :
707 : static inline int pci_is_managed(struct pci_dev *pdev)
708 : {
709 : return pdev->is_managed;
710 : }
711 :
712 : void pci_disable_device(struct pci_dev *dev);
713 : void pci_set_master(struct pci_dev *dev);
714 : void pci_clear_master(struct pci_dev *dev);
715 : int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
716 : int pci_set_cacheline_size(struct pci_dev *dev);
717 : #define HAVE_PCI_SET_MWI
718 : int __must_check pci_set_mwi(struct pci_dev *dev);
719 : int pci_try_set_mwi(struct pci_dev *dev);
720 : void pci_clear_mwi(struct pci_dev *dev);
721 : void pci_intx(struct pci_dev *dev, int enable);
722 : void pci_msi_off(struct pci_dev *dev);
723 : int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
724 : int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
725 : int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
726 : int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
727 : int pcix_get_max_mmrbc(struct pci_dev *dev);
728 : int pcix_get_mmrbc(struct pci_dev *dev);
729 : int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
730 : int pcie_get_readrq(struct pci_dev *dev);
731 : int pcie_set_readrq(struct pci_dev *dev, int rq);
732 : int __pci_reset_function(struct pci_dev *dev);
733 : int pci_reset_function(struct pci_dev *dev);
734 : void pci_update_resource(struct pci_dev *dev, int resno);
735 : int __must_check pci_assign_resource(struct pci_dev *dev, int i);
736 : int pci_select_bars(struct pci_dev *dev, unsigned long flags);
737 :
738 : /* ROM control related routines */
739 : int pci_enable_rom(struct pci_dev *pdev);
740 : void pci_disable_rom(struct pci_dev *pdev);
741 : void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
742 : void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
743 : size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
744 :
745 : /* Power management related routines */
746 : int pci_save_state(struct pci_dev *dev);
747 : int pci_restore_state(struct pci_dev *dev);
748 : int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
749 : int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
750 : pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
751 : bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
752 : void pci_pme_active(struct pci_dev *dev, bool enable);
753 : int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable);
754 : int pci_wake_from_d3(struct pci_dev *dev, bool enable);
755 : pci_power_t pci_target_state(struct pci_dev *dev);
756 : int pci_prepare_to_sleep(struct pci_dev *dev);
757 : int pci_back_from_sleep(struct pci_dev *dev);
758 :
759 : /* For use by arch with custom probe code */
760 : void set_pcie_port_type(struct pci_dev *pdev);
761 : void set_pcie_hotplug_bridge(struct pci_dev *pdev);
762 :
763 : /* Functions for PCI Hotplug drivers to use */
764 : int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
765 : #ifdef CONFIG_HOTPLUG
766 : unsigned int pci_rescan_bus(struct pci_bus *bus);
767 : #endif
768 :
769 : /* Vital product data routines */
770 : ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
771 : ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
772 : int pci_vpd_truncate(struct pci_dev *dev, size_t size);
773 :
774 : /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
775 : void pci_bus_assign_resources(const struct pci_bus *bus);
776 : void pci_bus_size_bridges(struct pci_bus *bus);
777 : int pci_claim_resource(struct pci_dev *, int);
778 : void pci_assign_unassigned_resources(void);
779 : void pdev_enable_device(struct pci_dev *);
780 : void pdev_sort_resources(struct pci_dev *, struct resource_list *);
781 : int pci_enable_resources(struct pci_dev *, int mask);
782 : void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
783 : int (*)(struct pci_dev *, u8, u8));
784 : #define HAVE_PCI_REQ_REGIONS 2
785 : int __must_check pci_request_regions(struct pci_dev *, const char *);
786 : int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
787 : void pci_release_regions(struct pci_dev *);
788 : int __must_check pci_request_region(struct pci_dev *, int, const char *);
789 : int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
790 : void pci_release_region(struct pci_dev *, int);
791 : int pci_request_selected_regions(struct pci_dev *, int, const char *);
792 : int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
793 : void pci_release_selected_regions(struct pci_dev *, int);
794 :
795 : /* drivers/pci/bus.c */
796 : int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
797 : struct resource *res, resource_size_t size,
798 : resource_size_t align, resource_size_t min,
799 : unsigned int type_mask,
800 : void (*alignf)(void *, struct resource *,
801 : resource_size_t, resource_size_t),
802 : void *alignf_data);
803 : void pci_enable_bridges(struct pci_bus *bus);
804 :
805 : /* Proper probing supporting hot-pluggable devices */
806 : int __must_check __pci_register_driver(struct pci_driver *, struct module *,
807 : const char *mod_name);
808 :
809 : /*
810 : * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
811 : */
812 : #define pci_register_driver(driver) \
813 : __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
814 :
815 : void pci_unregister_driver(struct pci_driver *dev);
816 : void pci_remove_behind_bridge(struct pci_dev *dev);
817 : struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
818 : int pci_add_dynid(struct pci_driver *drv,
819 : unsigned int vendor, unsigned int device,
820 : unsigned int subvendor, unsigned int subdevice,
821 : unsigned int class, unsigned int class_mask,
822 : unsigned long driver_data);
823 : const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
824 : struct pci_dev *dev);
825 : int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
826 : int pass);
827 :
828 : void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
829 : void *userdata);
830 : int pci_cfg_space_size_ext(struct pci_dev *dev);
831 : int pci_cfg_space_size(struct pci_dev *dev);
832 : unsigned char pci_bus_max_busnr(struct pci_bus *bus);
833 :
834 : int pci_set_vga_state(struct pci_dev *pdev, bool decode,
835 : unsigned int command_bits, bool change_bridge);
836 : /* kmem_cache style wrapper around pci_alloc_consistent() */
837 :
838 : #include <linux/dmapool.h>
839 :
840 : #define pci_pool dma_pool
841 : #define pci_pool_create(name, pdev, size, align, allocation) \
842 : dma_pool_create(name, &pdev->dev, size, align, allocation)
843 : #define pci_pool_destroy(pool) dma_pool_destroy(pool)
844 : #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
845 : #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
846 :
847 1 : enum pci_dma_burst_strategy {
848 : PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
849 : strategy_parameter is N/A */
850 : PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
851 : byte boundaries */
852 : PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
853 : strategy_parameter byte boundaries */
854 : };
855 :
856 : struct msix_entry {
857 : u32 vector; /* kernel uses to write allocated vector */
858 : u16 entry; /* driver uses to specify entry, OS writes */
859 : };
860 :
861 :
862 : #ifndef CONFIG_PCI_MSI
863 : static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
864 : {
865 : return -1;
866 : }
867 :
868 : static inline void pci_msi_shutdown(struct pci_dev *dev)
869 : { }
870 : static inline void pci_disable_msi(struct pci_dev *dev)
871 : { }
872 :
873 : static inline int pci_msix_table_size(struct pci_dev *dev)
874 : {
875 : return 0;
876 : }
877 : static inline int pci_enable_msix(struct pci_dev *dev,
878 : struct msix_entry *entries, int nvec)
879 : {
880 : return -1;
881 : }
882 :
883 : static inline void pci_msix_shutdown(struct pci_dev *dev)
884 : { }
885 : static inline void pci_disable_msix(struct pci_dev *dev)
886 : { }
887 :
888 : static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
889 : { }
890 :
891 : static inline void pci_restore_msi_state(struct pci_dev *dev)
892 : { }
893 : static inline int pci_msi_enabled(void)
894 : {
895 : return 0;
896 : }
897 : #else
898 : extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
899 : extern void pci_msi_shutdown(struct pci_dev *dev);
900 : extern void pci_disable_msi(struct pci_dev *dev);
901 : extern int pci_msix_table_size(struct pci_dev *dev);
902 : extern int pci_enable_msix(struct pci_dev *dev,
903 : struct msix_entry *entries, int nvec);
904 : extern void pci_msix_shutdown(struct pci_dev *dev);
905 : extern void pci_disable_msix(struct pci_dev *dev);
906 : extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
907 : extern void pci_restore_msi_state(struct pci_dev *dev);
908 : extern int pci_msi_enabled(void);
909 : #endif
910 :
911 : #ifndef CONFIG_PCIEASPM
912 : static inline int pcie_aspm_enabled(void)
913 : {
914 : return 0;
915 : }
916 : #else
917 : extern int pcie_aspm_enabled(void);
918 : #endif
919 :
920 : #ifndef CONFIG_PCIE_ECRC
921 : static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
922 : {
923 : return;
924 : }
925 : static inline void pcie_ecrc_get_policy(char *str) {};
926 : #else
927 : extern void pcie_set_ecrc_checking(struct pci_dev *dev);
928 : extern void pcie_ecrc_get_policy(char *str);
929 : #endif
930 :
931 : #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
932 :
933 : #ifdef CONFIG_HT_IRQ
934 : /* The functions a driver should call */
935 : int ht_create_irq(struct pci_dev *dev, int idx);
936 : void ht_destroy_irq(unsigned int irq);
937 : #endif /* CONFIG_HT_IRQ */
938 :
939 : extern void pci_block_user_cfg_access(struct pci_dev *dev);
940 : extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
941 :
942 : /*
943 : * PCI domain support. Sometimes called PCI segment (eg by ACPI),
944 : * a PCI domain is defined to be a set of PCI busses which share
945 : * configuration space.
946 : */
947 : #ifdef CONFIG_PCI_DOMAINS
948 : extern int pci_domains_supported;
949 : #else
950 : enum { pci_domains_supported = 0 };
951 : static inline int pci_domain_nr(struct pci_bus *bus)
952 : {
953 : return 0;
954 : }
955 :
956 : static inline int pci_proc_domain(struct pci_bus *bus)
957 : {
958 : return 0;
959 : }
960 : #endif /* CONFIG_PCI_DOMAINS */
961 :
962 : /* some architectures require additional setup to direct VGA traffic */
963 : typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
964 : unsigned int command_bits, bool change_bridge);
965 : extern void pci_register_set_vga_state(arch_set_vga_state_t func);
966 1 :
967 : #else /* CONFIG_PCI is not enabled */
968 :
969 : /*
970 : * If the system does not have PCI, clearly these return errors. Define
971 : * these as simple inline functions to avoid hair in drivers.
972 : */
973 :
974 : #define _PCI_NOP(o, s, t) \
975 : static inline int pci_##o##_config_##s(struct pci_dev *dev, \
976 : int where, t val) \
977 : { return PCIBIOS_FUNC_NOT_SUPPORTED; }
978 :
979 : #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
980 : _PCI_NOP(o, word, u16 x) \
981 : _PCI_NOP(o, dword, u32 x)
982 : _PCI_NOP_ALL(read, *)
983 : _PCI_NOP_ALL(write,)
984 :
985 : static inline struct pci_dev *pci_find_device(unsigned int vendor,
986 : unsigned int device,
987 : struct pci_dev *from)
988 : {
989 : return NULL;
990 : }
991 :
992 : static inline struct pci_dev *pci_get_device(unsigned int vendor,
993 : unsigned int device,
994 : struct pci_dev *from)
995 : {
996 : return NULL;
997 : }
998 :
999 : static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1000 : unsigned int device,
1001 : unsigned int ss_vendor,
1002 : unsigned int ss_device,
1003 : struct pci_dev *from)
1004 : {
1005 : return NULL;
1006 : }
1007 :
1008 : static inline struct pci_dev *pci_get_class(unsigned int class,
1009 : struct pci_dev *from)
1010 : {
1011 : return NULL;
1012 : }
1013 :
1014 : #define pci_dev_present(ids) (0)
1015 : #define no_pci_devices() (1)
1016 : #define pci_dev_put(dev) do { } while (0)
1017 :
1018 : static inline void pci_set_master(struct pci_dev *dev)
1019 : { }
1020 :
1021 : static inline int pci_enable_device(struct pci_dev *dev)
1022 : {
1023 : return -EIO;
1024 : }
1025 :
1026 : static inline void pci_disable_device(struct pci_dev *dev)
1027 : { }
1028 :
1029 : static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1030 : {
1031 : return -EIO;
1032 : }
1033 :
1034 : static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1035 : {
1036 : return -EIO;
1037 : }
1038 :
1039 : static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1040 : unsigned int size)
1041 : {
1042 : return -EIO;
1043 : }
1044 :
1045 : static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1046 : unsigned long mask)
1047 : {
1048 : return -EIO;
1049 : }
1050 :
1051 : static inline int pci_assign_resource(struct pci_dev *dev, int i)
1052 : {
1053 : return -EBUSY;
1054 : }
1055 :
1056 : static inline int __pci_register_driver(struct pci_driver *drv,
1057 : struct module *owner)
1058 : {
1059 : return 0;
1060 : }
1061 :
1062 : static inline int pci_register_driver(struct pci_driver *drv)
1063 : {
1064 : return 0;
1065 : }
1066 :
1067 : static inline void pci_unregister_driver(struct pci_driver *drv)
1068 : { }
1069 :
1070 : static inline int pci_find_capability(struct pci_dev *dev, int cap)
1071 : {
1072 : return 0;
1073 : }
1074 :
1075 : static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1076 : int cap)
1077 : {
1078 : return 0;
1079 : }
1080 :
1081 : static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1082 : {
1083 : return 0;
1084 : }
1085 :
1086 : /* Power management related routines */
1087 : static inline int pci_save_state(struct pci_dev *dev)
1088 : {
1089 : return 0;
1090 : }
1091 :
1092 : static inline int pci_restore_state(struct pci_dev *dev)
1093 : {
1094 : return 0;
1095 : }
1096 :
1097 : static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1098 : {
1099 : return 0;
1100 : }
1101 :
1102 : static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1103 : pm_message_t state)
1104 : {
1105 : return PCI_D0;
1106 : }
1107 :
1108 : static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1109 : int enable)
1110 : {
1111 : return 0;
1112 : }
1113 :
1114 : static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1115 : {
1116 : return -EIO;
1117 : }
1118 :
1119 : static inline void pci_release_regions(struct pci_dev *dev)
1120 : { }
1121 :
1122 : #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1123 :
1124 : static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1125 : { }
1126 :
1127 : static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1128 : { }
1129 :
1130 : static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1131 : { return NULL; }
1132 :
1133 : static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1134 : unsigned int devfn)
1135 : { return NULL; }
1136 :
1137 : static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1138 : unsigned int devfn)
1139 : { return NULL; }
1140 :
1141 : #endif /* CONFIG_PCI */
1142 :
1143 : /* Include architecture-dependent settings and functions */
1144 :
1145 : #include <asm/pci.h>
1146 :
1147 : #ifndef PCIBIOS_MAX_MEM_32
1148 : #define PCIBIOS_MAX_MEM_32 (-1)
1149 : #endif
1150 :
1151 : /* these helpers provide future and backwards compatibility
1152 : * for accessing popular PCI BAR info */
1153 : #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1154 : #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1155 : #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1156 : #define pci_resource_len(dev,bar) \
1157 : ((pci_resource_start((dev), (bar)) == 0 && \
1158 : pci_resource_end((dev), (bar)) == \
1159 : pci_resource_start((dev), (bar))) ? 0 : \
1160 : \
1161 : (pci_resource_end((dev), (bar)) - \
1162 : pci_resource_start((dev), (bar)) + 1))
1163 :
1164 : /* Similar to the helpers above, these manipulate per-pci_dev
1165 : * driver-specific data. They are really just a wrapper around
1166 : * the generic device structure functions of these calls.
1167 : */
1168 : static inline void *pci_get_drvdata(struct pci_dev *pdev)
1169 : {
1170 : return dev_get_drvdata(&pdev->dev);
1171 : }
1172 :
1173 : static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1174 : {
1175 : dev_set_drvdata(&pdev->dev, data);
1176 : }
1177 :
1178 : /* If you want to know what to call your pci_dev, ask this function.
1179 : * Again, it's a wrapper around the generic device.
1180 : */
1181 : static inline const char *pci_name(const struct pci_dev *pdev)
1182 : {
1183 : return dev_name(&pdev->dev);
1184 : }
1185 :
1186 :
1187 : /* Some archs don't want to expose struct resource to userland as-is
1188 : * in sysfs and /proc
1189 : */
1190 : #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1191 : static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1192 : const struct resource *rsrc, resource_size_t *start,
1193 : resource_size_t *end)
1194 : {
1195 : *start = rsrc->start;
1196 : *end = rsrc->end;
1197 : }
1198 : #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1199 :
1200 :
1201 : /*
1202 : * The world is not perfect and supplies us with broken PCI devices.
1203 : * For at least a part of these bugs we need a work-around, so both
1204 : * generic (drivers/pci/quirks.c) and per-architecture code can define
1205 : * fixup hooks to be called for particular buggy devices.
1206 : */
1207 :
1208 : struct pci_fixup {
1209 : u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1210 : void (*hook)(struct pci_dev *dev);
1211 : };
1212 :
1213 : enum pci_fixup_pass {
1214 : pci_fixup_early, /* Before probing BARs */
1215 : pci_fixup_header, /* After reading configuration header */
1216 : pci_fixup_final, /* Final phase of device fixups */
1217 : pci_fixup_enable, /* pci_enable_device() time */
1218 : pci_fixup_resume, /* pci_device_resume() */
1219 : pci_fixup_suspend, /* pci_device_suspend */
1220 : pci_fixup_resume_early, /* pci_device_resume_early() */
1221 : };
1222 :
1223 : /* Anonymous variables would be nice... */
1224 : #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1225 : static const struct pci_fixup __pci_fixup_##name __used \
1226 : __attribute__((__section__(#section))) = { vendor, device, hook };
1227 : #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1228 : DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1229 : vendor##device##hook, vendor, device, hook)
1230 : #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1231 : DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1232 : vendor##device##hook, vendor, device, hook)
1233 : #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1234 : DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1235 : vendor##device##hook, vendor, device, hook)
1236 : #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1237 : DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1238 : vendor##device##hook, vendor, device, hook)
1239 : #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1240 : DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1241 : resume##vendor##device##hook, vendor, device, hook)
1242 : #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1243 : DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1244 : resume_early##vendor##device##hook, vendor, device, hook)
1245 : #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1246 : DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1247 : suspend##vendor##device##hook, vendor, device, hook)
1248 :
1249 :
1250 : void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1251 :
1252 : void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1253 : void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1254 : void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1255 : int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1256 : int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1257 : const char *name);
1258 : void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1259 :
1260 : extern int pci_pci_problems;
1261 : #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1262 : #define PCIPCI_TRITON 2
1263 : #define PCIPCI_NATOMA 4
1264 : #define PCIPCI_VIAETBF 8
1265 : #define PCIPCI_VSFX 16
1266 : #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1267 : #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1268 :
1269 : extern unsigned long pci_cardbus_io_size;
1270 : extern unsigned long pci_cardbus_mem_size;
1271 : extern u8 __devinitdata pci_dfl_cache_line_size;
1272 : extern u8 pci_cache_line_size;
1273 :
1274 : extern unsigned long pci_hotplug_io_size;
1275 : extern unsigned long pci_hotplug_mem_size;
1276 :
1277 : int pcibios_add_platform_entries(struct pci_dev *dev);
1278 : void pcibios_disable_device(struct pci_dev *dev);
1279 : int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1280 : enum pcie_reset_state state);
1281 :
1282 : #ifdef CONFIG_PCI_MMCONFIG
1283 : extern void __init pci_mmcfg_early_init(void);
1284 : extern void __init pci_mmcfg_late_init(void);
1285 : #else
1286 : static inline void pci_mmcfg_early_init(void) { }
1287 : static inline void pci_mmcfg_late_init(void) { }
1288 : #endif
1289 :
1290 : int pci_ext_cfg_avail(struct pci_dev *dev);
1291 :
1292 : void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1293 :
1294 : #ifdef CONFIG_PCI_IOV
1295 : extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1296 : extern void pci_disable_sriov(struct pci_dev *dev);
1297 : extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1298 : #else
1299 : static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1300 : {
1301 : return -ENODEV;
1302 : }
1303 : static inline void pci_disable_sriov(struct pci_dev *dev)
1304 : {
1305 : }
1306 : static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1307 : {
1308 : return IRQ_NONE;
1309 : }
1310 : #endif
1311 :
1312 : #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1313 : extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1314 : extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1315 : #endif
1316 :
1317 : /**
1318 : * pci_pcie_cap - get the saved PCIe capability offset
1319 : * @dev: PCI device
1320 : *
1321 : * PCIe capability offset is calculated at PCI device initialization
1322 : * time and saved in the data structure. This function returns saved
1323 : * PCIe capability offset. Using this instead of pci_find_capability()
1324 : * reduces unnecessary search in the PCI configuration space. If you
1325 : * need to calculate PCIe capability offset from raw device for some
1326 : * reasons, please use pci_find_capability() instead.
1327 : */
1328 : static inline int pci_pcie_cap(struct pci_dev *dev)
1329 : {
1330 : return dev->pcie_cap;
1331 : }
1332 :
1333 : /**
1334 : * pci_is_pcie - check if the PCI device is PCI Express capable
1335 : * @dev: PCI device
1336 : *
1337 : * Retrun true if the PCI device is PCI Express capable, false otherwise.
1338 : */
1339 : static inline bool pci_is_pcie(struct pci_dev *dev)
1340 : {
1341 : return !!pci_pcie_cap(dev);
1342 : }
1343 :
1344 : void pci_request_acs(void);
1345 :
1346 : #endif /* __KERNEL__ */
1347 : #endif /* LINUX_PCI_H */
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