HDL Retrascope 0.2.2 released

HDL Retrascope 0.2.2 has been released.
Added by Sergey Smolov about 1 year ago

The new release contains the following changes:

  • Verilog testbench printer;
  • EfsmSimulatorUtils: utility methods for EFSM state/transition coverage printing;
  • VHDL/Verilog: support for non-0 starting bit vectors;
  • Verilog parser: merge 'assign' processes in CFG model if it is possible;
  • CGAA-to-EFSM: EFSM stabilization upon possible non-determinism;
  • Print tool execution time in command line mode;
  • HLDD-to-SMV printer that does not use assertions;
  • Bug fixes & general improvements.

The list of resolved issues can be found at the following link

The tool can be downloaded from here


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