Class VerilogModule


  • public final class VerilogModule
    extends VerilogNode
    VerilogModule represents the abstract syntax of the module declaration.
    • Constructor Detail

      • VerilogModule

        public VerilogModule​(VerilogNode parent)
        Creates a module.
        Parameters:
        parent - the parent node.
      • VerilogModule

        public VerilogModule​(VerilogModule other,
                             VerilogNode parent)
        Creates a copy of the module.
        Parameters:
        other - the module to be copied.
        parent - the parent node.
    • Method Detail

      • getType

        public VerilogModule.Type getType()
        Returns the type of the module.
        Returns:
        the type of the module.
      • setType

        public void setType​(VerilogModule.Type type)
        Sets the type of the module.
        Parameters:
        type - the type to be set.
      • isModule

        public boolean isModule()
        Checks whether the module is MODULE.
        Overrides:
        isModule in class VerilogNode
        Returns:
        true iff the module is MODULE.
      • isMacromodule

        public boolean isMacromodule()
        Checks whether the module is MACROMODULE.
        Returns:
        true iff the module is MACROMODULE.
      • isUserPrimitive

        public boolean isUserPrimitive()
        Checks whether the module is USER_PRIMITIVE.
        Returns:
        true iff the module is USER_PRIMITIVE.
      • isGatePrimitive

        public boolean isGatePrimitive()
        Checks whether the module is GATE_PRIMITIVE.
        Returns:
        true iff the module is GATE_PRIMITIVE.
      • setModule

        public void setModule()
        Sets the type of the module to MODULE.
      • setMacromodule

        public void setMacromodule()
        Sets the type of the module to MACROMODULE.
      • setUserPrimitive

        public void setUserPrimitive()
        Sets the type of the module to USER_PRIMITIVE.
      • setGatePrimitive

        public void setGatePrimitive()
        Sets the type of the module to GATE_PRIMITIVE.
      • getPorts

        public java.util.List<VerilogPort> getPorts()
        Returns the signature of the module (i.e., the list of its ports).
        Returns:
        the signature of the module.
      • addPort

        public void addPort​(VerilogPort port)
        Adds the port to the signature of the module.
        Parameters:
        port - the port to be added.
      • addDeclaration

        public void addDeclaration​(VerilogDeclaration declaration)
        Adds the declaration to the module.
        Parameters:
        declaration - the declaration to be added.