The Gaisler VHDL Library (GAISLER)

GAISLER Vendor ID: 0x01

Cores with APB or AHB interface

Device ID
Description
Manual
0x003
LEON3 SPARC V8 Processor
leon3.pdf
0x004
LEON3 Debug support unit (DSU)
leon3.pdf
0x005 AHB interface for Opencores 10/100 Mbit ethernet core ethernet.html
0x006
AHB/APB Bridge with plug&play support
apbctrl.html
0x007
AHB UART for externa debugging (DSU)
ahbuart.pdf
0x008
Simple 32-bit PROM/SRAM controller
srctrl.pdf
0x009
32/64-bit PC133 SDRAM controller
sdctrl.pdf
0x00C
UART with APB interface
apbuart.pdf
0x00D
Multi-processor interrupt controller for LEON3
irqmp.pdf
0x00E
SRAM with AHB interface
ahbram.html
0x011
Modular Timer unit
gptimer.pdf
0x012
Simple 32-bit PCI target with AHB interface
pci_tgt.pdf
0x014
32-bit PCI initiator/target with FIFO (AHB)
pci.pdf
0x015
32-bit PCI trace buffer
pcitrace.html
0x016
DMA controller for PCI interface
dmactrl.pdf
0x018
Ethernet-to-AHB debug controller
ethdsu.html



0x031
CCSDS Packet Telecommand Decoder (AHB)
grtc-1_3_1.pdf
0x032 Packet Wire interface (AHB)
grpw-1_1.pdf
0x033
CCSDS Central Time Manager
grctm-1_5.pdf



0x040
AHB Master for simulation ahbmst_em.html
0x041
AHB Slave for simulation
ahbslv_em.html

Other cores

High-performance IEEE-754 floating-point unit (FPU) with LEON3 interface grfpu.html
Single-port paramerizable RAM
syncram.html
Two-port paramerizable RAM syncram2p.html
Dual-port paramerizable RAM syncramdp.html
3-port paramerizable register file
syncram3p.html
Signed/unsigned 32x32 multiplier with paramerizable latency and throughput mul32.pdf
Signed/unsigned 64/32 divider, non-restoring, iterative div32.pdf
Portable clock generator for FPGA use
Reset generator
APB reporting module
APH reporting module
AHB controller with plug&play support