Package ru.ispras.verilog.parser.model
Class VerilogCaseGenerate
- java.lang.Object
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- ru.ispras.verilog.parser.core.AbstractSymbolTable<Tag>
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- ru.ispras.verilog.parser.core.AbstractNode<VerilogNode.Tag>
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- ru.ispras.verilog.parser.model.VerilogNode
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- ru.ispras.verilog.parser.model.VerilogCaseGenerate
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public final class VerilogCaseGenerate extends VerilogNode
VerilogCaseGenerate
represents generate case constructs.
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Nested Class Summary
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Nested classes/interfaces inherited from class ru.ispras.verilog.parser.model.VerilogNode
VerilogNode.Tag
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Nested classes/interfaces inherited from class ru.ispras.verilog.parser.core.AbstractNode
AbstractNode.NodeKind
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Field Summary
Fields Modifier and Type Field Description static VerilogNode.Tag
TAG
static java.util.EnumSet<VerilogNode.Tag>
TAGS_CHILDREN
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Constructor Summary
Constructors Constructor Description VerilogCaseGenerate(VerilogCaseGenerate other, VerilogNode parent)
Creates a copy of the generate case construct.VerilogCaseGenerate(VerilogNode parent)
Creates a generate case construct.
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Method Summary
All Methods Instance Methods Concrete Methods Modifier and Type Method Description void
addCase(VerilogCaseGenerateItem item)
Adds the case to the case selection construct.VerilogCaseGenerate
clone()
Clones the symbol table.java.util.List<VerilogCaseGenerateItem>
getCases()
Returns the cases.VerilogExpression
getExpression()
Returns the case selection expression.void
setExpression(VerilogExpression expression)
Sets the case selection expression.-
Methods inherited from class ru.ispras.verilog.parser.model.VerilogNode
getAttributes, getParentNode, isActivity, isAssertionStatement, isAssign, isAssignment, isAssignStatement, isAttribute, isBlockGenerate, isBlockStatement, isCaseGenerate, isCaseGenerateItem, isCaseStatement, isCaseStatementItem, isCode, isConnection, isDeclaration, isDelayedStatement, isDisableStatement, isGenerate, isIfGenerate, isIfGenerateBranch, isIfStatement, isIfStatementBranch, isInstantiation, isLoopGenerate, isLoopStatement, isModule, isNullStatement, isPathDeclaration, isPort, isPortConnection, isProcedure, isPropertyDeclaration, isPulseStyle, isSequenceDeclaration, isShowCancelled, isSpecify, isSvaPort, isTable, isTableEntry, isTaskStatement, isTriggerStatement, isWaitStatement, setAttributes, union
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Methods inherited from class ru.ispras.verilog.parser.core.AbstractNode
add, find, getFullName, getName, getParent, getTag, hasName, hasScope, isTransparent, items, items, items, remove, replace, setName, setParent, setRedefinitionHandler, setTag, toString
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Methods inherited from class ru.ispras.verilog.parser.core.AbstractSymbolTable
addAll, findAroundRecursively, findAroundRecursively, findRecursively, findRecursively, getUpperTable, items, items, setUpperTable
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Field Detail
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TAG
public static final VerilogNode.Tag TAG
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TAGS_CHILDREN
public static final java.util.EnumSet<VerilogNode.Tag> TAGS_CHILDREN
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Constructor Detail
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VerilogCaseGenerate
public VerilogCaseGenerate(VerilogNode parent)
Creates a generate case construct.- Parameters:
parent
- the parent node.
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VerilogCaseGenerate
public VerilogCaseGenerate(VerilogCaseGenerate other, VerilogNode parent)
Creates a copy of the generate case construct.- Parameters:
other
- the generate case construct to be copied.parent
- the parent node.
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Method Detail
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getExpression
public VerilogExpression getExpression()
Returns the case selection expression.- Returns:
- the expression.
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setExpression
public void setExpression(VerilogExpression expression)
Sets the case selection expression.- Parameters:
expression
- the expression to be set.
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getCases
public java.util.List<VerilogCaseGenerateItem> getCases()
Returns the cases.- Returns:
- the list of cases.
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addCase
public void addCase(VerilogCaseGenerateItem item)
Adds the case to the case selection construct.- Parameters:
item
- the case to be added.
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clone
public VerilogCaseGenerate clone()
Description copied from class:AbstractSymbolTable
Clones the symbol table.- Specified by:
clone
in classVerilogNode
- Returns:
- a copy of the symbol table.
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