Package ru.ispras.verilog.parser.transformer
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Class Summary Class Description VerilogTransformer VerilogTransformer
implements an engine that transforms expressions.VerilogTransformerBvconcat VerilogTransformerComposite VerilogTransformerComposite
implements a composite transformer.VerilogTransformerOperation VerilogTransformerOperation
implements Verilog-specific expression transformation rules.VerilogTransformerSvaInstance VerilogTransformerSvaInstance
represents the transformer of SVA instances.VerilogTransformerSvaStatement VerilogTransformerSvaStatement
represents the transformer of assertion statements.VerilogTransformerVariableRename VerilogTransformerVariableRename
implements an engine that renames local variables.VerilogTransformerVariableSubstitute VerilogTransformerVariableSubstitute
implements an engine that substitutes variables with expressions taking into account bit ranges.