public final class VerilogActivity extends VerilogNode
VerilogActivity
represents processes.
There are the following process types:
always
(ordinary process);initial
(initial process).Modifier and Type | Class and Description |
---|---|
static class |
VerilogActivity.Type
VerilogActivity.Type contains the process types. |
VerilogNode.Tag
AbstractNode.NodeKind
Modifier and Type | Field and Description |
---|---|
static VerilogNode.Tag |
TAG |
static java.util.EnumSet<VerilogNode.Tag> |
TAGS_CHILDREN |
Constructor and Description |
---|
VerilogActivity(VerilogActivity other,
VerilogNode parent)
Creates a copy of the process.
|
VerilogActivity(VerilogNode parent)
Creates a process.
|
Modifier and Type | Method and Description |
---|---|
VerilogActivity |
clone()
Clones the symbol table.
|
VerilogStatement |
getStatement()
Returns the statement of the process.
|
VerilogActivity.Type |
getType()
Returns the type of the process.
|
boolean |
isAlways()
Checks whether the process type is
ALWAYS . |
boolean |
isInitial()
Checks whether the process type is
INITIAL . |
void |
setAlways()
Sets the process type to
ALWAYS . |
void |
setInitial()
Sets the process type to
INITIAL . |
void |
setStatement(VerilogStatement statement)
Sets the statement to the process.
|
void |
setType(VerilogActivity.Type type)
Sets the type of the process.
|
getAttributes, getParentNode, isActivity, isAssign, isAssignment, isAssignStatement, isAttribute, isBlockGenerate, isBlockStatement, isCaseGenerate, isCaseGenerateItem, isCaseStatement, isCaseStatementItem, isCode, isConnection, isDeclaration, isDelayedStatement, isDisableStatement, isGenerate, isIfGenerate, isIfGenerateBranch, isIfStatement, isIfStatementBranch, isInstantiation, isLoopGenerate, isLoopStatement, isModule, isNullStatement, isPathDeclaration, isPort, isPortConnection, isProcedure, isPulseStyle, isShowCancelled, isSpecify, isTable, isTableEntry, isTaskStatement, isTriggerStatement, isWaitStatement, setAttributes, union
add, find, getFullName, getName, getParent, getTag, hasName, hasScope, isTransparent, items, items, items, remove, replace, setName, setParent, setRedefinitionHandler, setTag, toString
addAll, findAroundRecursively, findAroundRecursively, findRecursively, findRecursively, getUpperTable, items, items, setUpperTable
public static final VerilogNode.Tag TAG
public static final java.util.EnumSet<VerilogNode.Tag> TAGS_CHILDREN
public VerilogActivity(VerilogNode parent)
parent
- the node parent.public VerilogActivity(VerilogActivity other, VerilogNode parent)
other
- the process to be copied.parent
- the parent node.public VerilogActivity.Type getType()
ALWAYS
or INITIAL
.public void setType(VerilogActivity.Type type)
type
- the type to be set.public boolean isAlways()
ALWAYS
.true
iff the process type is ALWAYS
.public boolean isInitial()
INITIAL
.true
iff the process type is INITIAL
.public void setAlways()
ALWAYS
.public void setInitial()
INITIAL
.public VerilogStatement getStatement()
public void setStatement(VerilogStatement statement)
statement
- the statement to be set.public VerilogActivity clone()
AbstractSymbolTable
clone
in class VerilogNode