public final class VerilogDisableStatement extends VerilogStatement
VerilogDisableStatement
represents disable statements.VerilogNode.Tag
AbstractNode.NodeKind
Modifier and Type | Field and Description |
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static VerilogNode.Tag |
TAG |
static java.util.EnumSet<VerilogNode.Tag> |
TAGS_CHILDREN |
TAGS
Constructor and Description |
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VerilogDisableStatement(VerilogDisableStatement other,
VerilogNode parent)
Creates a copy of the disable statement.
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VerilogDisableStatement(VerilogNode parent)
Creates a disable statement.
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Modifier and Type | Method and Description |
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VerilogDisableStatement |
clone()
Clones the symbol table.
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VerilogPath |
getPath()
Returns the path to the object being disabled.
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void |
setPath(VerilogPath path)
Sets the path to the object being disabled.
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getAttributes, getParentNode, isActivity, isAssign, isAssignment, isAssignStatement, isAttribute, isBlockGenerate, isBlockStatement, isCaseGenerate, isCaseGenerateItem, isCaseStatement, isCaseStatementItem, isCode, isConnection, isDeclaration, isDelayedStatement, isDisableStatement, isGenerate, isIfGenerate, isIfGenerateBranch, isIfStatement, isIfStatementBranch, isInstantiation, isLoopGenerate, isLoopStatement, isModule, isNullStatement, isPathDeclaration, isPort, isPortConnection, isProcedure, isPulseStyle, isShowCancelled, isSpecify, isTable, isTableEntry, isTaskStatement, isTriggerStatement, isWaitStatement, setAttributes, union
add, find, getFullName, getName, getParent, getTag, hasName, hasScope, isTransparent, items, items, items, remove, replace, setName, setParent, setRedefinitionHandler, setTag, toString
addAll, findAroundRecursively, findAroundRecursively, findRecursively, findRecursively, getUpperTable, items, items, setUpperTable
public static final VerilogNode.Tag TAG
public static final java.util.EnumSet<VerilogNode.Tag> TAGS_CHILDREN
public VerilogDisableStatement(VerilogNode parent)
parent
- the parent node.public VerilogDisableStatement(VerilogDisableStatement other, VerilogNode parent)
other
- the disable statement to be copied.parent
- the parent node.public VerilogPath getPath()
public void setPath(VerilogPath path)
path
- the path to be set.public VerilogDisableStatement clone()
AbstractSymbolTable
clone
in class VerilogStatement